Here’s the important bit, the base region is extremely thin, you wouldn’t believe how incredibly thin it is (oops sorry, slipped into HHGTTG mode there) in fact it’s only a few tens of atoms across.
No, not nearly so! You're off by several orders of magnitude.
The critical measurement is the diffusion length in silicon. This varies by temperature (for obvious reasons?) and more strongly by material.
The distance a charge carrier can travel is limited by Brownian motion and recombination time. In silicon, it's a few microns. In germanium, it's tens of microns -- which is why BJT were first developed with germanium. (Ge is also less sensitive to impurities, because the intrinsic carrier density at room temperature is equivalent to something like a ~0.001% doping of random P/N junk. Or something like that. So it was doubly easier to work with!)
A base region thicker/wider than the diffusion length obviously won't have many charge carriers left to diffuse into the collector junction, even if it starts out saturated by lots of forward bias on the emitter.
So, practical (usually diffused, then later, epitaxy as well) junctions are in the single to fractional micron range.
I don't think BJTs are ever much thinner than that; the doping at least would have to be much higher, leading to lower voltage ratings, and Early effect would be pretty significant (i.e., base junction thinning due to the size of the collector depletion region).
It's worth noting that the channel conduction region in modern CMOS is about that level -- atoms (single nm) scale, that is. The doping levels are very high, which makes high conductivity, high shielding effect (i.e., the channel region that appears beneath the gate is very thin), and high leakage (relative to the size) and low voltage tolerance (maybe 2V breakdown!).
Also for related info: early (60s-70s) IC processes had resolution on the order of one or a few microns. So, one could draw some closely spaced lines, and apply P-N-P doping along them, to produce a lateral (current flow is sideways, not depthwise) transistor. These were symmetrical and had the voltage rating of most collectors (i.e., 30V), hence the high differential input voltage range of pretty much every classic analog circuit (uA741, LM339, etc.). hFE was pitiful (because of the wide base), maybe 5 at the most. But that was still good enough for differential input pairs (which is why these devices almost always have negative input bias current) and current mirrors (the accuracy was poor, but just to get any bias was good enough).
This behaviour explains why the gain is positively dependent on temperature and why gain falls off at low collector voltage when the voltage field is insufficient to prevent some of the electrons from being bounced back into the base region. The thinner the base region the higher the gain but it cannot ever be infinite because there must be some base conduction to maintain a voltage across the base-emitter junction.
The rest is correct, as far as I know. So for not having to use it, you remembered it awfully well, I guess
Some consequences:
- Superbeta transistors (hFE > 1000) require thin base layers
- So they should have terrible Early effect, and may even achieve punch-through rather than avalanche breakdown (i.e., the base thins so much that hFE effectively becomes infinite, amplifying its own leakage current into what looks like avalanche current; alternately, the base thins so much that it
ceases to exist (punch-through), and collector and emitter join together, effectively shorting out the device at that terminal voltage). So one should also expect low Vceo ratings.
Which as far as I know, are true, so it's good physics to know.
Tim
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