EEVblog #859 - Bypass Capacitor Tutorial

[T3sl4co1l]

But it will be unlikely to outperform a combination of an electrolytic and ceramic capacitor.

Yup, a hybrid approach, where a high-Q cap is dampened by a low-Q bulk cap, is best.  This gives low impedance at all frequencies, from DC (where the supply regulator dominates), to mid band (where the bulk cap ESR dominates), to high band (where the ceramic chip's ESR and ESL dominates).

Usually a single larger electrolytic capacitor is use for bulk decoupling of many packages and to swamp out resonances of the higher Q ceramic capacitors. (1)

Usually, a bulk cap goes at the end of a chain of supply connections, where the chain is made of traces linking loads with bypass caps.  It's a pretty safe topology, the ESL is easily estimated, and the required bulk cap C and ESR are easily calculated from that.

When the chains are single links only, it can be tricky.  When would that happen?  When loads are individually bypassed, and draw power from a plane pair.  In some cases, it can be better to not use local bypass in this situation, or to use longer traces from bypass cap to plane (so that ESL is large enough that it can be damped with a bulk cap).

Some application notes recommend this for specific parts like wideband operational amplifiers and converters.  I wonder though if these date from the time when through hole layouts were parasitic inductance was greater. (1)

Could be.

It does help if you use different sized chips -- ESL is proportional to length -- but you still must be mindful of damping, otherwise the worst-case impedance peak will rise above the required supply impedance, and you'll get spooky behavior at unlucky frequencies.

It is not quite the same situation but one project I did involved a 50 ohm high power capacitive ground isolator which operated from 50 MHz to 1.2 GHz.  It ended up with 4 x 1000pF, 4 x 0.01uF, and 4 x 0.1uF surface mount ceramic capacitors in parallel using a symmetrical coaxial transmission line layout.  Just using 4 x 0.1uF capacitors did not work at all.

Right.  You needed 12 x 0.1 instead.

I don't understand the topology from that brief description, so it's hard to say which way is better.  (The only thing you gain from using just 0.1's is BOM reduction, mind.)  Obviously, it worked out well enough your way, and that's what matters.

This sort of thing has always bothered me.  Why isn't the output from the power supply better controlled to limit surge current or dv/dt?

I don't think it's a thing you can control.  Surge can't be limited, on the time scale of the capacitor; current is drawn from all other bypasses and bulk caps, before the controller can do anything about it.  dV/dt should be fine with modern DC-DC controllers, as long as you aren't hot-plugging to the supply.  Apparently part of the problem is that, tants crack over time, and self-heal, and that self-heal process draws a huge gulp from the supply.  Which can cause random upsets!  And, of course, an unlucky self-heal that runs away, results in an exploded cap...

So it's something that has to be used carefully, I guess preferably on small supplies or sub-nets.  Fused caps can be used (that was an IBM thing, IIRC?).  Overrated caps (2-3x voltage) is part of it, of course.

Where long life, reliability and uptime is required, ceramic chip + ESR resistor is preferred.  The ESL isn't even any greater, if "wide body" parts are used.

(1) At some point it pays off to model the power distribution circuit and if you have the proper equipment, test it.  I suspect this is either foreign or infeasible for many engineers leading to a mix and mash of various rules of thumb for decoupling which usually work but not always.  Jim Williams had something to say about decoupling in Linear Technology application note 47 but unfortunately did not test any polymer electrolytic capacitors.

Yup. That we should be so lucky, that we work in a field where everything can be calculated and measured, if not always easily, but almost always with a hand-waving shortcut that is more than good enough!

Regarding polymers: they are simply low-voltage film caps.  Same energy density, same time constant (i.e., ESR * C), similar ESL (again, proportional to lead length, so, the chip styles are better than the can styles).  They don't leak current, or reform, like electrolytics do (at least, not as grossly), and they may self-heal (I've heard that some can, though the ones I've tested, failed shorted at about 120% of rating).

ESR is generally low, though a broad spectrum is available.  About the same range is available between polymer and tant, with the tants clustering towards higher ESR (say 0.1 to 10 ohms), and polymers clustering low (say 10m to 1 ohm).  There is plenty of room to shop around for ESR, in both types.

Since ESR is generally low, polymers can make things significantly worse by shorting transmission lines, leading to reflection rather than absorption of waves.

They are of course an excellent choice for power supplies, where the low ESR is required for stability and low loss.  This puts a very low impedance at one end of the supply, so that damping must be provided at the far end.

Or the supply must be designed with a low enough impedance throughout, comparable to the low ESR.  This is how most VCORE supplies are constructed -- a handful of polymers at the start and end of the VCORE plane, and a ton of ceramic chips spread evenly inbeteen.  Inspect a laptop motherboard some time, and see how the experts do it.

A good example where polymers shine, by themselves alone, is high power gate drives.  Like IXDD614CI driving +/-15V into a big IGBT.  A 100uF 35V poly across the power pins, is all that's needed to keep things happy!  Notice this acts exactly like the ceramic cap across a TTL chip, just scaled down in impedance and speed (t_r ~ 20ns, easily 10 times slower), and up in power.

Tim

[David Hess]

It is not quite the same situation but one project I did involved a 50 ohm high power capacitive ground isolator which operated from 50 MHz to 1.2 GHz.  It ended up with 4 x 1000pF, 4 x 0.01uF, and 4 x 0.1uF surface mount ceramic capacitors in parallel using a symmetrical coaxial transmission line layout.  Just using 4 x 0.1uF capacitors did not work at all.

Right.  You needed 12 x 0.1 instead.

I don't understand the topology from that brief description, so it's hard to say which way is better.  (The only thing you gain from using just 0.1's is BOM reduction, mind.)  Obviously, it worked out well enough your way, and that's what matters.

12 x 0.1 was the first thing I tried and it failed at high frequencies.  4 x 0.1, 4 x 0.01, and 4 x 0.001 worked so well that I stopped at that point.  I was just using cheap 1206 size ceramic capacitors; maybe 4 (or 12) x 0.1uF RF parts would have worked but they would have cost much more than my final solution.

Essentially this was a coaxial DC block with the DC block part on the shield rather than the center conductor.  The capacitors were symmetrically placed around the periphery.  It had to operate at 50 watts from 50MHz to 1.2GHz with a minimum loss.  The final design worked great; loss was essentially too low to measure and consistent with the residual loss of the coaxial transmission line itself.

This sort of thing has always bothered me.  Why isn't the output from the power supply better controlled to limit surge current or dv/dt?

I don't think it's a thing you can control.  Surge can't be limited, on the time scale of the capacitor; current is drawn from all other bypasses and bulk caps, before the controller can do anything about it.  dV/dt should be fine with modern DC-DC controllers, as long as you aren't hot-plugging to the supply.  Apparently part of the problem is that, tants crack over time, and self-heal, and that self-heal process draws a huge gulp from the supply.  Which can cause random upsets!  And, of course, an unlucky self-heal that runs away, results in an exploded cap...

Most of the failures I have seen happened at turn on and even more where there was a lack of current limiting, lack of soft start, or where dV/dT was not limited by bulk output capacitance.

I no longer consider solid tantalum capacitor failures a mystery.  The big problem appears to be stress cracks from thermal cycling during soldering; the same capacitors which have been burned in and tested before soldering have their infant mortality reset by soldering.  The other failures are just straight dV/dT or surge current due to poor design (lack of derating) and then the rare mysteries where the capacitor is operating within its voltage specifications, has no ripple current, and just fails as you watch it.  The last might be due to field crystallization around defects but NASA says this does not occur with low voltage parts.  That I have not seen this happen with hermetically sealed parts suggests to me that it is related to stress induced by the epoxy packaging from humidity maybe?

[T3sl4co1l]

12 x 0.1 was the first thing I tried and it failed at high frequencies.  4 x 0.1, 4 x 0.01, and 4 x 0.001 worked so well that I stopped at that point.  I was just using cheap 1206 size ceramic capacitors; maybe 4 (or 12) x 0.1uF RF parts would have worked but they would have cost much more than my final solution.

Essentially this was a coaxial DC block with the DC block part on the shield rather than the center conductor.  The capacitors were symmetrically placed around the periphery.  It had to operate at 50 watts from 50MHz to 1.2GHz with a minimum loss.  The final design worked great; loss was essentially too low to measure and consistent with the residual loss of the coaxial transmission line itself.

Hmm, was that like a piece of hardline slit open (not through, leaving the center conductor and insulator in place)?  Sounds really mechanically dubious, was there support elsewhere?  What pattern were the capacitors, alternating values?

I no longer consider solid tantalum capacitor failures a mystery.  The big problem appears to be stress cracks from thermal cycling during soldering; the same capacitors which have been burned in and tested before soldering have their infant mortality reset by soldering.  The other failures are just straight dV/dT or surge current due to poor design (lack of derating) and then the rare mysteries where the capacitor is operating within its voltage specifications, has no ripple current, and just fails as you watch it.  The last might be due to field crystallization around defects but NASA says this does not occur with low voltage parts.  That I have not seen this happen with hermetically sealed parts suggests to me that it is related to stress induced by the epoxy packaging from humidity maybe?

Hmm, could be.

On that note, I'm glad I have a dozen or two 10uF 50V hermetic (dry) tants. Huge, quite heavy, though the ESR isn't terribly great.  No wet-slugs though.  (If I did I'd probably sell them, hah!)

Tim

[David Hess]

Hmm, was that like a piece of hardline slit open (not through, leaving the center conductor and insulator in place)?  Sounds really mechanically dubious, was there support elsewhere?  What pattern were the capacitors, alternating values?

This was not for production.  I actually ended up using a length of RG-400 with the double braid cut away so that the surface mount capacitors were flush with the dielectric preserving the dimensions of the transmission line as much as possible.  With so many capacitors handling the strain, it was actually pretty rugged but still what I would consider fragile.  The length of RG-400 provided enough strain relief.

The surface mount capacitors were mounted edge on and not flat to the dielectric which is not ideal but allowed many more of them to be used to fill the circumference making it mechanically stronger.  There was no way that 12 would have fit if mounted flat although that was the original ideal.  The thickness of the double braided shielded helped here and of course the Teflon dielectric allowed soldering and clean up without melting.  I did not even consider trying this with anything other than solid Teflon dielectric.  The largest problem was the high thermal conductivity and thermal capacity of the double silver placed copper braid but a good temperature controlled soldering iron was enough.

Since 4 capacitors of each value were used, I placed each value at 90 degrees with respect to each other just like a 50 ohm coaxial termination might be made with 4 x 200 ohm resistors.

On that note, I'm glad I have a dozen or two 10uF 50V hermetic (dry) tants. Huge, quite heavy, though the ESR isn't terribly great.  No wet-slugs though.  (If I did I'd probably sell them, hah!)

The hermetically sealed solid tantalum capacitors I have saved were not much larger than any other tantalum capacitor.  I have not measured a significant difference in ESR (actually dissipation) between the various flavors but I lack a low frequency network analyser or multifrequency LCR meter to make a good comparison which makes me wonder why wet tantalum capacitors were ever used in bulk power supply decoupling applications.  Maybe for higher ripple current and higher operating temperature?

[T3sl4co1l]

The surface mount capacitors were mounted edge on and not flat to the dielectric which is not ideal but allowed many more of them to be used to fill the circumference making it mechanically stronger.  There was no way that 12 would have fit if mounted flat although that was the original ideal.

Ah, and that explains the question of scale as well.  Crazy.

The hermetically sealed solid tantalum capacitors I have saved were not much larger than any other tantalum capacitor.  I have not measured a significant difference in ESR (actually dissipation) between the various flavors but I lack a low frequency network analyser or multifrequency LCR meter to make a good comparison which makes me wonder why wet tantalum capacitors were ever used in bulk power supply decoupling applications.  Maybe for higher ripple current and higher operating temperature?

Dunno.  Mil spec whatever they are, pretty sure no one else dares buy them -- except for the occasional test, apparently they (wet slug) have lower leakage than anything else but only after a week or two of "soak".

There are mil spec electrolytics as well, and high temperature ones, presumably the lifetime failure rates differ between them and one happens to be better for certain applications, damn the price.

Tim