Author Topic: 0 logic elements in vhdl code  (Read 478 times)

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Offline swampythe47

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0 logic elements in vhdl code
« on: August 02, 2018, 05:35:09 am »
I am posting some vhdl files. Can anyone please help me and answer why am i gettting 0 logic elements??

P.s.:-My code i getting compiled without any errors but its working on FPGA board(cyclone 2).Ultrasonic is my top level entity.
 

Online ataradov

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Re: 0 logic elements in vhdl code
« Reply #1 on: August 02, 2018, 05:56:02 am »
Alex
 


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