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AMD acquires Xilinx

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langwadt:

--- Quote from: peter-h on April 13, 2021, 09:22:36 pm ---Most motor control today is 3 phase brushless stuff and most of it is done with fairly fast CPUs e.g. ARM32F. These have 1-2us conversion time 12-bit ADCs, 12 bit DACs, and are easily capable of doing this job to any level of sophistication.

The problem is that designers like job security and there is nothing better than an FPGA for that. Nobody can do anything with it once the original designer is gone :)

--- End quote ---

when you have 400V and 1000A it makes sense to have some hardware as a last defense against the software doing something silly

langwadt:

--- Quote from: filssavi on April 13, 2021, 09:50:27 pm ---
--- Quote from: peter-h on April 13, 2021, 09:22:36 pm ---Most motor control today is 3 phase brushless stuff and most of it is done with fairly fast CPUs e.g. ARM32F. These have 1-2us conversion time 12-bit ADCs, 12 bit DACs, and are easily capable of doing this job to any level of sophistication.

The problem is that designers like job security and there is nothing better than an FPGA for that. Nobody can do anything with it once the original designer is gone :)

--- End quote ---

That is as long as you are unsina a VSI inverter with standard modulation, or maybe a diode clamped NPC (if you chose the correct MCU) anything more than that and the PWM modulators/timers will not be sufficient anymore
Than you are forced to go to an FPGA  just to have enough of the right kind of PWM channels ( most STM32 while more than capable enough from a computational power perspective have only 1 “advanced” timer that does deadtime, complementary outputs etc.

--- End quote ---

doesn't most if not all F4/F7 have two advanced timers?

filssavi:

--- Quote from: langwadt link=topic=276122.msg3548688#msg3548688 ---doesn't most if not all F4/F7 have two advanced timers?

--- End quote ---

I am pretty sure ( not 1000% though) that only selected parts in the F0 F3/G4 and H7 lines have the motor control timers  (no F4) the top of the line G4 has 3 advanced timers, that is 18 pwm and 12 additional from the HR timer  that is 30 PWMs
That is however no many in the big schema of thing, a colleague of mine was working on a system where the controller was responsible for. 4 NPC converters and that is 48 PWM right there.

Also the total determinism of FPGAs and CPLDs is very handy in making sure that nothing blows up for unexpected reasons.
And it makes safety certifications such as SIL much easier.

All in all it comes down to the fact that even a 100€ FPGA is not that expensive of a BOM item in a converter the size of a small room where you are paying multiple hundreds of dollars (or even thousands) in capacitor alone

langwadt:

--- Quote from: filssavi on April 14, 2021, 05:02:43 am ---
--- Quote from: langwadt link=topic=276122.msg3548688#msg3548688 ---doesn't most if not all F4/F7 have two advanced timers?

--- End quote ---

I am pretty sure ( not 1000% though) that only selected parts in the F0 F3/G4 and H7 lines have the motor control timers  (no F4)

--- End quote ---

I've mostly used the F407 it has two advanced timers with complemenetary outputs and programmable dead time

peter-h:
I can tell you that "total determinism of FPGAs" is fiction :)

It is close, if designed correctly, paying lots of attention to sync clocking etc, but it is easy to generate a design which is temperature-marginal, metastable, etc.

There is no fundamental difference between complex logic in hardware, and software. There are just different ways to screw up :)

FPGAs are ever so tempting for many projects because you can go for a "direct solution" whereas with software you often have to use imagination (clever use of timers, etc). But you pay for that dead-end development route afterwards, with dead-end tools which go unsupported after a year or two, and a project nobody can pick up.

I don't know what the current Xilinx tool licensing is (it isn't dongles anymore) but if they use FlexLM that is a nightmare.

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