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AMD acquires Xilinx

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gnuarm:

--- Quote from: Bassman59 on April 16, 2021, 02:08:09 am ---Turns out that the key words above are "before buttoning-up." In a proper installation the board with big FPGA is installed such that you put a silpad between the chip and the big cold finger the chip goes up against when the board is installed. if the silpad isn't there and the board isn't screwed into place, the FPGA gets warm. Warm enough to no longer meet timing.

--- End quote ---

Sure, the temperature specs on FPGAs are junction temperature.  If you are running commercial temp range, if the junction gets out of that range the timing is not guaranteed.  No different from running your car with no coolant.  Not the car's fault and not the FPGA or tools fault.

20 years ago I was working on an Altera 10K design (I think that's what the chips were called).  It was actually an upgrade to test gear to add ATM, if I recall.  When they first worked that design they had trouble with timing as there was some disconnect in the tools or our timing constraints.  Altera would not help us with it so in the respin of the FPGA we had to do our own temperature qualification of the design.  We ended up running many iterations of the MAX+II tools with different seeds every night and testing them until we found one that worked.  They were planning to discontinue the tool, I think they didn't want to find any significant bugs that would need to be fixed.  They may have brought back the MAX+II tool later on, not sure why.

That was the only time in 25 years of working with FPGAs that I've seen that sort of a problem with the tools. 

Bassman59:

--- Quote from: gnuarm on April 16, 2021, 03:29:44 am ---
--- Quote from: Bassman59 on April 16, 2021, 02:08:09 am ---Turns out that the key words above are "before buttoning-up." In a proper installation the board with big FPGA is installed such that you put a silpad between the chip and the big cold finger the chip goes up against when the board is installed. if the silpad isn't there and the board isn't screwed into place, the FPGA gets warm. Warm enough to no longer meet timing.

--- End quote ---

Sure, the temperature specs on FPGAs are junction temperature.  If you are running commercial temp range, if the junction gets out of that range the timing is not guaranteed.  No different from running your car with no coolant.  Not the car's fault and not the FPGA or tools fault.
--- End quote ---

Right .. remember the tools tell you whether the design will work over the stated temperature/voltage range.

They don't tell you whether your design will or will not work outside of the range. See, it might, or it might not ... so, you must assume that it won't.

And we proved that, hey, yeah, when it's outside of the temperature spec, it doesn't work.

And further is that you can never tell exactly what won't work outside of spec range. Do you feel lucky?

This is why I never overclock a CPU.

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