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| ASM programming is FASCINATING! |
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| greenpossum:
--- Quote from: eti on August 01, 2020, 12:04:42 am --- --- Quote from: ebastler on July 30, 2020, 06:57:24 pm ---We seem to have lost the OP a while ago. More specifically, we lost him right after his original post. Maybe the fascination didn't last. ::) --- End quote --- No no, I am still browsing, I just have a real life outside forums, you know? There's only 24 hours a day, and I can't spend all of them online :) Besides, I bow to the superior ASM knowledge of all thread contributors; suffice to say that you guys appear to have infinitely more experience than me in this area, which is new to me for now, and I enjoy reading as and when I get 5 mins off to come here. --- End quote --- That's just the way EEVblog is, every discussion will eventually turn into a exposition by experts of angles far outside the scope of the original query or observation. Often educational but sometimes overwhelming. So I look at the reply count of a topic and if it's large, it's probably not worth entering. If there is a post worth reading, a targeted search will find it better. :-DD |
| MK14:
--- Quote from: eti on August 01, 2020, 12:18:46 am ---Well, here I am reporting in for duty, Sir! ;) What is my penalty - do I get bread and water rations tonight, or will you let me off? You do understand it has (barely) been FOUR DAYS since I started the topic? Hardly an eternity. I am sorry you feel the way you feel, see if you can find a family member to hug! --- End quote --- I can only express the opinions of one person. Let's see what others think. My perception was that this thread was started some 2 weeks ago. I'm amazed it was started on the 26th July. Human perception, can make mistakes, like mine just did, sometimes. |
| eti:
--- Quote from: MK14 on August 01, 2020, 12:23:21 am --- --- Quote from: eti on August 01, 2020, 12:18:46 am ---Well, here I am reporting in for duty, Sir! ;) What is my penalty - do I get bread and water rations tonight, or will you let me off? You do understand it has (barely) been FOUR DAYS since I started the topic? Hardly an eternity. I am sorry you feel the way you feel, see if you can find a family member to hug! --- End quote --- I can only express the opinions of one person. let's see what others think. My perception was that this thread was started some 2 weeks ago. I'm amazed it was started on the 26th July. Human perception, can make mistakes, like mine just did, sometimes. --- End quote --- It's alright, don't think any more about it, we all make mistakes my friend - it's a TOTAL non-issue to me :) |
| Ian.M:
@Eti, So now you've had a chance to catch up, where do you want to direct this thread to? --- Quote from: eti on July 27, 2020, 02:54:44 am ---If anyone would like to comment or advise how best to get a true, firm grasp on ASM, I'm open to suggestions. --- End quote --- IMHO that's best achieved by programming in assembler with the big thick core instruction set 'bible' for your processor open beside you, though reading other people's well commented code can also help. However, jumping right in at the keyboard and coding freehand is counter-productive* - that's how you make a mess of spaghetti code. As ASM has so little structure, you must always code with clear objectives, develop well defined interfaces between modules of your program, and keep track of side effects (e.g. registers a subroutine 'smashes'). An hour designing appropriate data structures is worth ten or even a hundred hours coding. * Early in learning a particular CPU core free coding routines small enough to grok in their entirety, then stepping through them either under a debugger or dry-running them has its place, but if you have to scroll the editor window or shuffle pages to find a branch target its getting too big to reliably comprehend. One thing that's essential is a quick reference card that shows which registers and flags are affected by each instruction, as especially on CPUs with minimal working registers, you will find yourself testing something, doing <something else>, then attempting a conditional branch on the result of the test. Its nice to be able to pull it off to avoid having to duplicate the code <something else>, but of course <something else> mustn't smash the flag bit(s) needed for the conditional branch. On the subject of evil instruction sets: the baseline (12 bit) PIC core cant return from a subroutine without smashing W (its accumulator and sole working register) as it doesn't have a RETURN instruction. It only has RETLW (Return literal in W), so any subroutine that needs to pass back a value in W has to have multiple exit points, one for each possible value! |
| RJSV:
Responding here with noted differences, 6502 and Z-80 compared:. Both types have same math, so that helps, if writing ASM code. Now, 6502 and 6800 are termed 'memory mapped' (the registers holding active variables). Writing ASM with a Z-80, that CPU is termed as a dedicated register type, (not an industry term, exactly). So, for example a block move on the Z-80 will have formal requirements, such as 'put count in such and such (B and C up to 64k counts). Formally, put source pointer in HL (again 64k range). In your 6502 ASM world, the formality is maybe more limited in that the highest priority 'registers' are few. But, and this is the magic of the 6502, you get a huge number (256) of next-highest registers; so many as to allow easy assignment of a couple HUNDRED variables, just sitting there for dedicated and rare use. Who cares, if register #117 contains a count of how many wombats fly East every hour, my Wombat subroutine is just going to keep a privately owned bin there, maybe only reported each month, or some dang thing the person writing the ASM wanted. You see the maintaining or separation of function, but without swapping things around, to prevent harmful mixing of Wombats with 'Zebras', in on-going accumulation of data results. Uh, not clear, huh? So consider in using a solar system analogy. A Z-80 might be like having a SUN with 4 planets, plus a swarm of meteorites way out. The access to the 4 very-near planets is excellent, while the further off asteroids are required as well, as the highest priority (Z-80 registers) are very limited in quantity and thus likely transient. A 6502 however, has next to highest working registers residing as 256 'page-zero' mapped', thus maybe permanent, meaning some manipulations (increment decrement) can occur directly and be done. Then, even more mapping allows a third tier mapped' into the space from 256 thru 64K bytes. A sort analogy of a planetary system having 3 rings of multiple planets. Rescue of Z-80 CPU preference comes largely from the 16 bit functions closely accessed. But I'd bet many factors such as having dedicated Z-80 support IC's such as Z-80 CTC, Z-80 SIO and a plus for looking like conventional expectations, maybe of some VP of Engineering somewhere. The , 6502, can wrong or right, look a bit flakey, considering emerging 'hobby' image. Uh, how was this, then? (I think 34 readers just quit and became antique furnishings dealers.) -thanks, RJ |
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