Here is a rough idea which is probably wrong and needs polishing. This is how I used to do these things 40 years ago so I am a bit rusty.
CD4011 has 4 NAND gates, Gates A and B form a RS bistable of pins 1 and 5 whichever goes low last will determine the state of the bistable.
Gates C and D are connected as inverters and so whichever goes high last will determine the state of the bistable.
In normal operation the Reset input is last and so the bistable is reset.
When power has been cut for just a moment then the Set input lasts longer and the bistable is set.
This is a very general idea which needs developing and testing.