EEVblog Electronics Community Forum
General => General Technical Chat => Topic started by: Psi on September 29, 2021, 08:33:06 am
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Does anyone know how electrolytic capacitors behave with a very short pulse of overvoltage.
(I'm thinking ~50ns duration ~30% overvoltage)
I'm sure it's not 'good' for them, but is this something that definitely leads to premature failure or something that is very frowned upon but probably not going to do much etc..
I noticed this on a prototype circuit and have already addressed it with higher voltage caps but it got me wondering.
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Badly. It depends on how often that pulse takes place, but that will prematurely kill the cap. You are entering into partial discharges area, high frequency currents that affect the isolation. If that kind of pulse takes place often I'd say at least a 100% excess rated voltage needs to be used
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It takes a lot of current to charge the cap from 100% to 130% within 50 ns. Chances are the ESR / ESL would prevent this from really reaching the capacitor part. If seen on the scope, the question is if this is real, of more like the lead inductance.
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interesting.
Thanks.
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Does anyone know how electrolytic capacitors behave with a very short pulse of overvoltage.
(I'm thinking ~50ns duration ~30% overvoltage)
I'm sure it's not 'good' for them, but is this something that definitely leads to premature failure or something that is very frowned upon but probably not going to do much etc..
I noticed this on a prototype circuit and have already addressed it with higher voltage caps but it got me wondering.
I realize that your question has already been answered...
I don't have any experience with this type of testing nor am I confident of my calculations.
One thing that you didn't specify is whether the capacitor is precharged at 100% of it's rated voltage before before pulsing with +30% overvoltage or whether you're pulsing the capacitor with 130% of it's rated voltage from a discharged state.
If I = C dV / dt then dt = 25ns since the pulse is symmetrical (25ns charge followed by 25ns discharge) and dV depends on the initial charge state of the capacitor.
If E = ½CV² and you further-energize the capacitor for 50ns then the dissipated power (power is Joules per second) then that is a lot of power.
I suppose the capacitor's ESR would be vaporized doing this (P = I²R). Also, I think the ESR would limit the effects.
Are you planning to test the capacitor in a blast chamber? You will likely end up with one very angry capacitor! :rant:
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It was 25V cap at 14V nominal that would shoot up to around 32V for 50ns before dropping back to ~22V
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Some electrolytic capacitors have a "surge" rating, not sure what mechanism allows for that.
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If the ESL and ESR are limiting the spike in the capacitor, I wonder what the spike would really be without the capacitor there?
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It was 25V cap at 14V nominal that would shoot up to around 32V for 50ns before dropping back to ~22V
Chances are the overshoot to 32 V would be mainly from the ESL and wires. This means it would not actually reach the capacitor and the higher voltage would not be a problem. However if happening too often one could exceed the ripple current rating and this way heap up too much.
I would consider adding some parallel MLCC to reduce the current spike / voltage overshoot.
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I never thought to consider ESL as being a contributing factor in this test.
Kirchhoff's Voltage Law says that the pulse voltage should be equal to the sum of the voltages across the series components; ESL + C + ESR.
Since inductors oppose a change in current and capacitors oppose a change in voltage, there should be an initial voltage across ESL = VP - VC where VP is the pulse voltage and VC is the capacitor voltage. Initially when time is infinitesimally > 0, I = 0 due to ESL behaving like an open circuit opposing current flow. The current flowing into the capacitor should ramp up as t > 0 causing the capacitor voltage VC and the ESR voltage VR to increase. ESR will dissipate some power due to I²R. As current ramps up the voltage across ESL should drop.
ESL is probably very small <1µH maybe 500nH. If the pulse duration is brief relative to ESL then ESL shouldn't saturate.
What would happen if a schottky diode was connected across the capacitor with cathode to output and anode to ground? Would the schottky diode behave like a freewheeling diode in a buck converter?
What if you wrap some masking tape around the capacitor and point a thermal camera at it during repeated-pulse testing?
I guess it depends on your goals.
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A diode would not help, as the voltage never does negative.
What would help, could be a 2nd parallel capacitor, even if smaller (like 100 nF).
With only 1 µF a the rise from, 14 V to 22 V are still 8 µC and for a pulse lenght of 50 ns this would be 160 A on average ! The the ESL must be small, more like only a few nH and this could still explain the observed spike. This must be a hell lot of a machine to cause such spikes.
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This must be a hell lot of a machine to cause such spikes.
yeah, it's 100-200A DC winch controller.
(I did find the max voltage spike was less than stated above when probed with the scope ground spring right on the cap as closes as physically possible. But the issue has been solved by using 50V ceramic caps)
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What value?
Again, inductance is significant, so it might not appear at the capacitor at all (say, if you could sneak an ideal diff probe down into the capacitor's rollup), or at worst, across just the ESR.
And since your duty cycle is low, it's not going to overheat or whatever.
Tim
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This must be a hell lot of a machine to cause such spikes.
yeah, it's 100-200A DC winch controller.
(I did find the max voltage spike was less than stated above when probed with the scope ground spring right on the cap as closes as physically possible. But the issue has been solved by using 50V ceramic caps)
That means most of the measured spike is the result of magnetic flux from nearby switching currents. Anyway depending on what this capacitor is doing I'd even use a PP cap or ceramic with 100V
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The cap where i saw the original pulse was 1000uF 25V.
I'm now using around 120uF of 50V ceramic caps.