So, just putting the finishing touches to the latest repair project - a Racal Dana 1998 1300Mhz frequency counter. No photos of this one I'm afraid - partly because I forgot to take any "pre" photos and partly because there's already been a
detailed teardown of a 1992 universal counter timer on the forum. The 1998 is very similar apart from the front panel and firmware.
I think this one is ex MOD, probably Navy because it looks as though it has been used on board ship, or at any rate a damp and possibly salty environment - heavily corroded around the transformer and back of the PCB but fairly easily rescued with a good clean and resoldering a few joints.
Anyway, I was testing it and all seemed well. It has the 04E high stability oscillator which is nice and without touching the calibration it's accurate to about 5 parts in 10
8 - sadly my GPS disciplined oscillator has died so full calibration will have to wait. I'll check it against my FE-5680A when I get chance.
However - and the real reason behind the post, at 1kHz there was a lot of difference between successive readings - initially I thought it was a fault but tried two signal generators and also a 1991 counter-timer that I picked up at the same time. All four combinations yielded the same result - the last three or four digits were effectively random.
But then I started thinking about it. How do frequency counters produce 8, 9 or 10 digit resolution at frequencies of 1kHz or so? Or any frequency for that matter?
I know there are two basic techniques . First the traditional count the input signal for a fixed period. Well, count 1kHz for 1 second and you've got a resolution of 1Hz or 1 in 10
3, to get 9 digit resolution would require a gate time of 1x10
6 seconds - personally I'd rather not wait 11 and a half days for the frequency counter to produce a result.
Alternatively count timebase pulses - the 1998 has a 10MHz reference. That's 1x10
4 pulses per period of the input signal. Great, we've gone from three to four digits :-/
I can see that counting multiple input signal periods can be used, so you could get 7 digit resolution by counting 1000 cycles of the input signal with a 1 second gate time - but the 1998 will display 9 digits at a 1s gate time - I don't understand where the extra resolution comes from.
Maybe a modern FPGA based design could multiply the reference clock up to a GHz to get that sort of resolution but this is a late 1980's design ( the 1991 I have was built in...... 1991 and the 1998 was built in 1994) so I doubt it's taking that approach.
How does it come up with 8 or 9 digit resolution for a 1kHz input?