Are SuperCaps on 100-amp VCore supplies a thing yet?

[frogblender]

I have a product which has a 300-amp VCore supply at .7v
(Yes, the asic it is attached to is fully capable of sinking battleships and setting your lab on fire).

The asic has very spiky current draw - which I figger easily exceeds the 300A supply, for usecs at a time.
Despite the underside of the asic being wall-to-wall with ceramic caps, there is still voltage droop during the current spikes (tens of millivolts, for a couple of microseconds until the switchmode turns on the jets.  But then once the current spike is over, the voltage will overshoot by the same amount).

So... Are SMT small supercaps with super-low ESR a thing yet?

A quick peruse of digikey shows most supercaps have huge ESR, and are for RTC's and such (where ESR matters not, and almost all are giant radial pinthru cans).
But some caps claim tens-of-milliohm ESR, which is getting into the ballpark of usefullness for huge-current switchmode supplies.   Anyone have any experience?

[thm_w]

What switchmode IC is being used, could it run at a higher frequency or response be tweaked?
What is the capacitance of the ceramic caps used?
Have you looked at tantalum-polymer capacitors? https://www.digikey.ca/en/products/filter/tantalum-polymer-capacitors/70

You may compare to motherboard designs, they deal with ~200A+ with vcore of ~1.2V

[tom66]

The voltage droop is a function of capacitance, but you only need ~1,000uF, not ~1F, that an ultracap may give you.

A polymer electrolytic may be the best compromise between capacitance and ESR.
Tantalum capacitors are also still competitive in low-ESR applications.
Finally, multi-phase SMPS converters get effective switching frequencies well into the 10's of MHz, and eliminate voltage droop by responding very quickly.

I would consider all of these before ultracapacitors.

[T3sl4co1l]

Exactly, the time constant isn't there -- for nanoseconds to microseconds, you need ceramic caps; for microseconds to milliseconds, you need electrolytics (roughly including solid tantalum and aluminum polymer).  Supercaps just barely begin to be useful in the milliseconds; they're best in the seconds range.  Still further out, various types of cells serve seconds to minutes (the new lithium titanate nanoparticle stuff?), to minutes to hours (LiPo, ion, NiMH, etc.), to hours or days (lead acid, etc.).

Interesting to note, you're largely not storing energy here.  I mean, you are, a lot of it, but that's not why you're doing it.  It's not energy for the sake of energy: energy is only incidental to keeping the supply impedance low as hell.

If we had capacitors that have C ~ 0 for most of their voltage range, then C ~ nominal for voltages within say 10% of operating voltage -- we'd be glad as hell!  Supply voltage can ramp up quickly from zero, because there's almost nothing on it, then in the last few percent, a lot of charging work is needed, storing only the energy over that range.  Then under normal load fluctuations, only a percent of whatever of that is actually used -- as bypass gets better, voltage change gets smaller and energy exchange drops towards zero.

So, the fact that supply ripple is small, is proof that it's not about energy storage -- if it were, voltage would be allowed to change more, to make more efficient use of those capacitors.

As it turns out, such devices do in fact exist -- poled (electret) ceramics.  Whereas an ordinary ceramic has maximum capacitance around zero bias, and less and less at elevated voltage, these have an electric field frozen in, so their maximum capacitance "zero bias" point falls at some offset instead!

I don't think this works at low voltages though; the example I'm aware of is designed for industrial application, 400V or thereabouts.  (For sure, 0.7V is just about "zero bias" for most parts I've seen, no worries there. )

Tim

[amyk]

You may compare to motherboard designs, they deal with ~200A+ with vcore of ~1.2V

I wondered how much current modern CPUs draw, since I haven't done stuff in that area for a few years now, and according to

https://linustechtips.com/topic/1137619-motherboard-vrm-tier-list-v2-currently-amd-only/

and some manufacturer's specs, there are mobos which are capable of up to 700A at ~1v

I'm a little suspicious of those numbers, since that's an effective impedance of around a miliohm, and I know how thick a 200A arc welding cable is...

[tszaboo]

No, because if you drain 100A from a cap that has 1mOhm ESR, thats 10W dissipated in that capacitor (simplified calculation). You need really low ESR, and you need to distribute the heat, so end up with a design, with lot of small capacitors.

[Siwastaja]

Even with "super" or "ultra" in the name, it doesn't mean it's better in all respects.

The double layer electrolytics are developed for high capacitance at the expense of ESR. The best types have quite low ESR but nothing comparable to MLCC of similar size; but a lot of capacitance (that you don't need in Vcore supply).

Different capacitor types are for different time constants. You could say an ultra/supercap is intermediate between classic elcap and a battery. Battery is discharged in an hour; an elcap is a millisecond, maybe tens of microseconds for a low-impedance, low-ESR type; an ultracap in tens of seconds. Vcore regulator needs something discharged in a few microseconds.

A Vcore regulator needs to go from classic elcap to the exact opposite direction.

Capacitance is not the problem, ESR and inductance is. Hence MLCC.

Ripple voltage is a function of capacitance, ESR and inductance. If you try to reduce the (already small) capacitance-originating ripple voltage of MLCC solution by using an elcap or ultracap, the ESR and ESL originating ripple voltage component will shoot through the roof.

Tens of milliohms is completely unsuitable. You can of course parallel but what happens to inductance? The parts need to go further and further away. When you have succeeded to find low enough ESR, you still have too big of a solution and a lot more capacitance than you need.

Question of "making supercap suitable" for Vcore regulator is like asking how a horse could be modified to fly like a fighter jet.

Or adding ultracapacitors when you need MLCCs is like using a hard disk to implement L1 cache.

[Someone]

Exactly, the time constant isn't there -- for nanoseconds to microseconds, you need ceramic caps; for microseconds to milliseconds, you need electrolytics (roughly including solid tantalum and aluminum polymer).  Supercaps just barely begin to be useful in the milliseconds; they're best in the seconds range.

The state of the art/market is always moving, so your "ranges" are a little outdated. Right at the bleeding edge there are low impedance supercaps:
https://catalogs.avx.com/BestCap.pdf
Aluminum polymer is in the mature technology camp having been on PC motherboards for going on 15 or so years.

[coppice]

Exactly, the time constant isn't there -- for nanoseconds to microseconds, you need ceramic caps; for microseconds to milliseconds, you need electrolytics (roughly including solid tantalum and aluminum polymer).  Supercaps just barely begin to be useful in the milliseconds; they're best in the seconds range.

The state of the art/market is always moving, so your "ranges" are a little outdated. Right at the bleeding edge there are low impedance supercaps:
https://catalogs.avx.com/BestCap.pdf
Aluminum polymer is in the mature technology camp having been on PC motherboards for going on 15 or so years.

Those are the solid aluminium electrolytics that replaced tantalums in high reliability long lifetime applications, like telecoms, in the 1980s. They are now used all over the place, as they have become cheaper. These aren't like the devices most people call supercapacitors.

[T3sl4co1l]

Hah, I like how they specify the label is composed of "label".

So a time constant in the 10s of ms, not bad.  Curious what the proton exchange chemistry is; would seem to suggest highly acidic activity (proton donor = Brønsted–Lowry acid).  A very brief search shows some research papers working with phorphoric acid, or pyrophosphate at high temperatures, that would make sense (not to say that's at all what they're doing here).  Interesting that the voltage seems to be much higher than most ionic capacitors (i.e., not 2.5-2.7V).  Not clear how many cells they're using, those are some oddly chosen voltages -- 3.6, 4.5, 5.5?  9, 12 and etc. are clearly multiples of one or the other type.

Guh, leakage current is specified, and "test voltage" is not.  They clearly show rated voltage in one column, but make no indication whether that's the test condition or what.  At least the leakage test is a fast cycle, indicative of much faster equilibria -- whereas EDLCs need days, weeks even, for diffusion to subside well enough to take a meaningful long-term leakage measurement.  (That is to say, their "dielectric absorption" behavior is consistent with a diffusion mechanism, i.e. C ~ 1/sqrt(f) for some f > f_c.)

Tim

[David Hess]

Are SMT small supercaps with super-low ESR a thing yet?

Compared to ceramic or film capacitors?  No, and offhand I do not know of any efforts in that direction.  High frequency low ESR decoupling applications do not need more capacitance; they need lower impedance which is limited by ESR and ESL.

Even higher performance applications build the decoupling capacitance into the board substrate between the power planes by adding a dielectric.

[frogblender]

So the general consensus answer to my original question seems to be:  No, small SMT supercaps with low ESR are not a thing yet.

The lowest ESR listed on the "AVX BestCap" link (posted by @someone) is 30mΩ max, which is not bad... but it is in a giant 1"x2" package, so the lead inductance precludes its effectiveness as VCore decoupling...

But mankind is getting there:  10 or 15 year ago supercaps didn't even exist (well, maybe they did, but I couldn't buy them on ebay).  And the general trend on CPUs and such is:
- lower core voltage (necessitating higher amperage, all else being equal)
- higher wattage (necessitating higher amperage, all else being equal).
So the trend is ridiculously higher and higher currents, which requires higher capacitance for a given ripple (and the trend is also smaller ripple specs too... 50mV ripple on a 80386's 3.3v supply is nothing.   But 50mV on today's 700mV Vcore is a bluescreen).

Anyhoo.... let's check back in 5 years....

[Someone]

So the trend is ridiculously higher and higher currents, which requires higher capacitance for a given ripple (and the trend is also smaller ripple specs

Or instead of more capacitance you can have smaller inductors, higher switching and crossover frequency, or more phases. Lots of ways to get low ripple/noise.

The lowest ESR listed on the "AVX BestCap" link (posted by @someone) is 30mΩ max, which is not bad... but it is in a giant 1"x2" package, so the lead inductance precludes its effectiveness as VCore decoupling...

They included plots of impedance way up in frequency, it looks like the package inductance is well controlled and would be interesting to see what it looks like when coupled to a plane. But the volume is 10mm³/mF, compared to Ceramics around 50mm³/mF or Aluminium Polymer around 500mm³/mF. So if you want smaller volumes, yes they are able to do that. No height restrictions? Aluminium Polymer do ok per unit of surface area.

[Siwastaja]

So the general consensus answer to my original question seems to be:  No, small SMT supercaps with low ESR are not a thing yet.

"Yet", why would they need to be? They are already super-low ESR compared to the batteries they compete against. All improvements are being made to make them higher capacity so they could rival batteries, and this will be done at the cost of ESR. By no means can you expect 100x improvement in ESR, none of the buyers of these caps want it or need it.

The lowest ESR listed on the "AVX BestCap" link (posted by @someone) is 30mΩ max, which is not bad... but it is in a giant 1"x2" package, so the lead inductance precludes its effectiveness as VCore decoupling...

This is some two orders of magnitude worse than MLCC. Equally sized MLCC bank is maybe like 0.03 mOhm. Or you get 30mOhm from a tiny 0402 MLCC.

But mankind is getting there:

What makes you think anyone else than you wants to force a supercap in a use case where existing solution works way way better? All the supercap development is happening based on completely different applications, namely energy storage within seconds, not microseconds, typical marketing example would be a regenerative braking of a commuter train. Heck, the whole technology has been developed for such purposes.

- lower core voltage (necessitating higher amperage, all else being equal)
- higher wattage (necessitating higher amperage, all else being equal).

Which is exactly why MLCC works there so well. Why would improving a technology 100x worse make any sense?

I think you want to take a look at solid-state electrolytics as well.

This really sounds like you have had some misunderstanding somewhere and now have this strange fixation.

[Siwastaja]

To put it in numbers:

In Vcore supply, you need, say,
1nH
1mOhm
10uF

With MLCC, you get that, and just that, easily.

With ultracaps, you could get
10nH
10mOhm
100000uF

Or with tomorrow's even better ultracaps, you'd get:
10nH
10mOhm
200000uF

They could of course offer some miniaturized ultracaps that would bring you
5nH
5mOhm
10000uF

but I'm not sure anyone would buy them. The direction is towards larger and larger ultracap banks.

[T3sl4co1l]

And again -- you aren't storing energy in this sort of application, you're just presenting a very low impedance to the load.  All those extra uF's are dead weight.  Electrically speaking, it's not strictly worse to have extra capacitance -- but if there's a cheaper, smaller method, why wouldn't you use it?

Tim

[nctnico]

I have a product which has a 300-amp VCore supply at .7v
(Yes, the asic it is attached to is fully capable of sinking battleships and setting your lab on fire).

The asic has very spiky current draw - which I figger easily exceeds the 300A supply, for usecs at a time.
Despite the underside of the asic being wall-to-wall with ceramic caps, there is still voltage droop during the current spikes (tens of millivolts, for a couple of microseconds until the switchmode turns on the jets.  But then once the current spike is over, the voltage will overshoot by the same amount).

Sound to me like there is a control loop problem or the control loop just can't keep up. I assume your DC-DC converter is using 3 or more phases? How much capacitance is at the output of the power supply if you only count the ceramic caps? An easy fix may be to add several hundred uf using MLCC capacitors in a small case. Something like 47uf 6.3V X5R 0603. As others pointed out electrolytics or even tantalum won't do you any good.

Based on the current & ripple you see in the original circuit you should be able to work out the extra capacitance needed from the maximum allowable ripple.

[Siwastaja]

I don't believe the story of an ASIC taking 300A "peaks" for µsecs. Is this is digital ASIC? What are the clock frequencies of the most power hungry clock domains? For example, at f_clk = 100 MHz period is 10ns and dynamic/shootthrough current spikes would be shorter than this, in picosecond range, at least 5-6 orders of magnitude from being µsecs.

AFAIK, in a normally designed ASIC non-switching gates provide the capacitance required to drive capacitive load of the switching gates.

So assuming a digital ASIC running at today's clock speeds, if it is taking some power at µsec scale then this is more like the average power during some operation when many gates are switching many times, well 300A is of course possible but being average not peak power, this isn't a problem of capacitance. Just design a high-frequency converter, fill the underside of the board with MLCCs as usual, and off you go.

This sounds like approx. three times bigger than the typical desktop computer CPU Vcore supply, it shouldn't require any different approach. I bet the chip is larger, too.

A lot of phases, maximized f_sw, maybe GaN would help?

Capacitors need enough energy storage for the timescale defined by the f_sw and inductor value. The value may be surprisingly small, like some tens of uF, easy to achieve with bank of cheap 0201..0603 parts under the chip! After this is satisfied, all that matters is ESL and ESR.

Seeing overshoot mentioned, I agree it's likely a control loop issue.