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How to plot C-V characteristics of varactor diode in LT-Spice?
Ian.M:
LTspice does have a capmeter: SpecialFunctions\capmeter, and capometer.sub that works in a .tran analysis, but I've yet to find good instructions for using it. I did however reverse engineer the subcircuit back to a node and component identical schematic, which may aid an expert in understanding it enough to explain its use.
N.B. pins 1 (DUT+) and 2 (DUT-) have no DC path to ground - you *MUST* provide them externally.
N.B.2. Its outputs 4 (Resistance) and 5 (Capacitance) are blanked for the first 10us of the sim and thereafter will require approx at least 10us to reach steady state. If you are sweeping bias, sweep it sloooooly!
The attachment is just the capometer internal schematic, its *NOT* a ready to run demo of its use.
Jay_Diddy_B:
--- Quote from: T3sl4co1l on August 08, 2020, 05:13:13 pm ---If your sim doesn't have a C-meter (or it's not general purpose -- IIRC XSPICE introduced such a thing, that really just serves to measure pure capacitances (C's) and digital pin loads, nothing else; YMMV in other tools), you'll have to do it the old fashioned way. For this, set up for AC steady state analysis, with the expression C = Ic / (2*pi*freq*Vc), where Ic is the capacitor current (magnitude), and Vc is the capacitor voltage (magnitude). Then sweep DC bias.
Tim
--- End quote ---
Tim,
The cap meter is not in standard SPICE as you suggest. But the OP asked how to do this in LTspice.
The LTspice model basically performs the math that you describe but it separates the real and imaginary components to obtain the capacitance and resistance, the imaginary and real components of the DUT.
Jay_Diddy_B
Jay_Diddy_B:
--- Quote from: Ian.M on August 08, 2020, 05:33:06 pm ---LTspice does have a capmeter: SpecialFunctions\capmeter, and capometer.sub that works in a .tran analysis, but I've yet to find good instructions for using it. I did however reverse engineer the subcircuit back to a node and component identical schematic, which may aid an expert in understanding it enough to explain its use.
N.B. pins 1 (DUT+) and 2 (DUT-) have no DC path to ground - you *MUST* provide them externally.
N.B.2. Its outputs 4 (Resistance) and 5 (Capacitance) are blanked for the first 10us of the sim and thereafter will require approx 10us to reach steady state. If you are sweeping bias, sweep it sloooooly!
The attachment is just the capometer internal schematic, its *NOT* a ready to run demo of its use.
--- End quote ---
Ian.M thank you for your reverse engineering efforts.
There are some controls in the Capometer.
If you [CTRL RIGHT-CLICK] on the model you get:
These are let you set the following:
current = 1m <- this is the amplitude of the small signal test current
freq = 3MEG <- this is the frequency of the small signal test current.
C=0.5u <- not 100% certain, but this may be a blocking capacitor in series with the DUT.
Q=0.25 <- haven't figured this out.
The primary use of this tool was for checking to see how semiconductor parameters, for example, Coss in MOSFET, varies with DC bias.
This thread is inspiring me to make an inductor meter for checking inductance versus DC bias current.
Regards,
Jay_Diddy_B
Jay_Diddy_B:
Hi,
I have had another look at what the parameters are used for, thanks to reverse engineering efforts of Ian.M
The capacitor sets the roll-off a low pass filter.
There are a total of four filters cascaded, giving a slope of 80dB/decade.
The filter frequency set by
F = 1/ 2 x Pi x C
(R = 1)
for example C=0.5uF
F =318 kHz
The filter should be set to about 1/10 of the test frequency.
So if you use a 1 MHz test frequency, set C=1.5uF
The parameter Q is not used in the model.
Regards,
Jay_Diddy_B
Ian.M:
Q was for a commented out (in the current capometer.sub)
LC 'tank' circuit connected between node 'x' and ground.
--- Code: ---*C9 x 0 {1/(4*pi*freq/Q)}
*L1 0 x {1/(Q*pi*freq)}
--- End code ---
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