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I2C Multiplexer - Simple?

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nctnico:

--- Quote from: tom66 on May 27, 2023, 11:23:29 pm ---
--- Quote from: jwet on May 27, 2023, 04:49:07 pm ---Also, you only need to do it on one line- the Data line IIRC.  You just have to keep from creating a start condition.

--- End quote ---

If you have any slaves that clock stretch, you definitely need to do the muxing on all signals.

--- End quote ---
No! Absolutely not. Clock stretch can only happen during an active transaction with a device by that device. With a mux in the SDA lines, the other device will not even see an active transaction and hence not stretch the clock either. It is the same as when a device on the same bus is not addressed, it will not stretch the clock.

Infraviolet:
"which would likely leave you with a broken bus"

Useful trick, often 9 cycles of up and down on the clock line will force a slave to reset its I2C hardware, for well designed ones atleast.

I'd always recommend, where feasible and if you have control of the design of the slave and the master, to include an extra digital line from master to a spare input pin on a slave (or a single one to pins on all slaves) where, after any crash/hang the master can tell the slaves to reset their I2C hardware to a known-good state before making any more transactions. This obviously won't work for pre-built slave devices, although many have a reset pin which can reset the whole chip if you're in a situation where the time for a slave to restart doing its job after a reset isn't too long and where it doesn't have anything in volatile memory you'd need to keep.

fourfathom:
Here's a follow-up on the I2C mux (and also my SAMD clocking question elsewhere):

I used the "analog mux on the I2C data line" trick, with a timer-tick ISR to manage the selection of the I2C device (this is in a six-channel ham radio beacon, each channel gets a timeslot and the necessary I2C activity takes much less than the timeslot duration.)  Here's a link to the beacon project announcement: https://turnislandsystems.com/meet-the-beaconblaster-6/  I've got a couple of prototypes running now.

Thank you all for your advice!

Siwastaja:
I had a design where I needed to switch 10-to-1
* 8-bit syncronous parallel bus + clock signal (50-MHz-ish)
* I2C
* one analog signal (phototransistor-generated voltage)

These were special time-of-flight imager chips, interfaced to STM32F743 MCU.

I did it with four 12-bit 1-to-3 analog switches, SN74CBT16214C. The only special need really was to place I2C pull-ups at the slave side so that each of the ten had their own. Of course this mux tree needed 8 GPIO signals in total to choose the active slave, but number of IO is not always a problem.

All those signals ran in 50-pin 0.5mm pitch flat-flex cables, with every other line as ground for modest level of shielding and impedance control. Never saw any problems with I2C or parallel bus either.

VK3DRB:

--- Quote from: nctnico on May 26, 2023, 06:59:38 pm ---You can use an analog switch (like the 74HC(T)4067 for 16 channels) in the SDA line. I have done this is several designs. Make sure to add a pull-up (like 100k Ohm) to the SDA lines of each output so they stay high.

--- End quote ---

More like around 4.7K pullup, depending upon load capacitance and data speed. Best to check the waveform on an oscilloscope and use resistors according to the waveform so it meets the I2C standard, and/or that provided by the datasheets. I have done designs with six devices on the one bus and had to use 2.2K pullups.

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