Author Topic: Injection locking the 10Mhz OCXO to external reference (upgrading a FY6600)  (Read 1952 times)

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Offline Labrat101

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You have totally lost me now . ocxo are really not my field never worked with before I did mention
this a way back. .Injection locking is new to me . and been following though learning .
 you said
However, you might find it easier to use a PLL to feed a trimming voltage to the EFC pin normally controlled only with a well padded out multi-turn trimpot that's normally used to facilitate manual calibration of test equipment blessed with an OCXO to provide it with an internal highly accurate and stable free running clock oscillator reference.

What is the EFC Pin do you mean the vco of the ocxo .?

Switchable would be fine as well I am just looking to get a stable signal out ..
The CD40106 was all I had .. my parts box is full of chips but not these . mainly PIC,AD converters,
op amps & Digi pots CPUs etc. this is what we normally work with on various projects
And normally Just regular xtals which I have boxs of..

In short, made this a challenge but in the end I feel that i'm going to take 20 kilo Hammer to it.
That is what my son said to me to do in the first place to do.  >:D
and Just Buy a $500 one  :-DD
I got a Lemon in the first place when it started smoking after just an hour.
But Stubborn as I'M thought it would be good to follow though with all these adventures from the
People who know.

I do do development of electronics but not the HF . etc Mainly test equipment for Cars etc.
and custom upgrades .  Televisions, old radios ,High voltage , monitors, Motherboards SMPS etc
 are not a problem to Me.
So Thanks I have got too Lost Now .

RNS


If it's Gets Hot its Working. If its Getting cold! it's your Coffee.
" It All Started With A BIG Bang ... & Magic Smoke "
 

Offline Johnny B Good

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 The EFC pin is the electronic frequency control (aka, tuning voltage input). An OCXO is not like a normal VCO with a typical tuning ratio of from 2:1 to 10:1. The tuning range is generally limited to no more than +/- 2 or 3ppm with 1ppm being typical.

 When it's being used as a free running stand alone high precision timing reference in a radio or a piece of test equipment, this EFC voltage can be obtained from a high quality multi-turn trimpot, typically padded out with additional resistors fed from a very stable voltage, usually obtained from the OCXO's own built in LDO powering the xtal oscillator itself (the Vref pin). The constant load of the oscillator (14mA in the CQE examples I own) eliminates variation of voltage with load and the constant temperature (set somewhere in the range, 65 to 85 deg C) eliminates the issue of changes with temperature, providing pretty close to a perfectly temperature stable reference voltage for this job.

 Since you generally only need some 10 to 20 percent of the whole tuning voltage range (typically 0 to +10 volts with a 12v OCXO) to provide a decade's worth of re-calibration adjustment, the trimpot is padded out so its control range is nicely centred around the current tuning voltage requirement, perhaps biased toward the low end in the case of the positive tuning law type on the assumption that ageing will lower the frequency, requiring ever higher tuning voltage settings to compensate as the years roll by.

 Most OCXOs have an EFC pin to allow them to be disciplined from a more long term stable reference such as a rubidium lamp or an atomic clock based reference, either directly or via a GPS receiver. Very few, usually cheaper models, don't have such an EFC pin, possessing instead a built in trimmer capacitor like their cheap TCXO cousins to allow them to be manually recalibrated from time to time.

 Even fewer (perhaps none at all) have both an EFC pin and a tuning trimmer since an EFC pin alone allows disciplined or undisciplined operation where the latter can be manually calibrated with an external trimpot which can be sited in a more convenient location remote from the OCXO itself.

 I started this topic thread in the hope of receiving some useful advice from those more expert in the subject. In the end, help there was none but this didn't stop me from running the experiments to seemingly becoming the EEVBlog's resident expert in this field.

 Once I had figured out how to injection lock my 10MHz sine wave output OCXOs, I felt it was only fair to publish my findings for all to peruse and possibly make use of in adaptations of their own. I did mention quite early on the caveats regarding the likely difficulties in using this technique with square wave output OCXOs.

 At that time, I had only been interested in injection locking the sine wave output types of OCXO through their output pin connection since this had proved to be the best route to success with the CQE OCXOs I had to hand. It hadn't occurred to me that an alternative  way of achieving this goal, especially in the case of "Injection Proof" square wave output types, lay in the use of a PLL to lock to an external 10MHz reference via control of the EFC tuning voltage until your proposed use of such injection resistant OCXOs at double the 10MHz reference frequency gave me cause to consider the PLL method.

 Using a PLL might offer a better way to achieve a glitchless way to transfer from the internal clock reference to an external atomic standard based lab reference. At this time I'm only guessing that this could be the case. It needs to be tried and tested before I can offer this as an alternative to the the frequency injection locking method. In the meantime, I'll eventually put one final touch to my injection locking module - replacing that fixed 27pF with a 35 or 45 pF trimmer. I could add more, such as an indicator lamp to show the presence of a valid 10MHz external reference locked state but that's not a high priority even though this would be an even nicer 'finishing touch'. :)

 If I do come up with a PLL based alternative, I'll post my findings to this topic thread... eventually. I may be gone for some time in this regard.

 As things stand with your proposed use of a 20MHz OCXO and a 3N502 to multiply this up to the required 50MHz which is a perfectly valid method, it does introduce the need to double the frequency of your external 10MHz lab reference regardless of whether you simply use a change-over switch or else use it for some sort of frequency injection locking circuit or a PLL to control the EFC voltage and lock it to your reference that way.

 Incidentally, the PLL method could save the need to double up the incoming 10MHz reference by using a simple divide by two of the 20MHz OCXO's output to feed the phase detector stage of your PLL mirroring the method used to lock the 10MHz OCXO in a basic GPSDO where it would have been divided by 10 million with the very first DIY GPSDOs and then by a mere thousand with later versions based on the Jupiter GPS receivers which could output a 10KHz signal locked to the 1 second PPS timing signal and these days divided down by just 100 or even just 10 using the programmable PPS signal of modern GPS receivers at 100KHz or 1MHz locked exactly to the GPS timing reference.

 Having considered that aspect of PLLing a lower frequency against a higher frequency, it looks to me like your best bet would be a PLL based method rather than struggle with trying to injection lock what I suspect will prove to be injection locking resistant OCXOs. In the end, this could prove to be the simplest way to glitchlessly lock your 20MHz OCXO to an external 10MHz reference.

 It might pay you to look at the CD74HCT4046A datasheet. It wasn't too clear as to how high a frequency its phase detectors could handle but going by the figures for the VCO (which you'll be disabling in this application) it looks ok to handle 10MHz input signals. I bought myself a lifetimes's supply (25!) just recently from a Chinese trader simply because they were a fraction of the asking price per IC from UK traders who seem to delight in taking the piss out of their compatriots.

 I have yet to test any of them out to determine their frequency limits. They provide three different phase detectors, each with their own charms and character flaws. This choice is extremely useful when optimising the PLL behaviour to best meet your requirements. I'll get round to testing them out sometime in the near future.

 The main snag in using a PLL versus injection locking is the new requirement to disconnect the PLL output from the EFC when it's not locked to a valid external reference so as to leave the manually calibrated setting unmolested under stand alone free running conditions. This issue simply doesn't exist with the injection locking method. This is a minor additional complication of the PLL alternative to injection locking the OCXO to an external reference.

 Since the PLL method avoids the use of limiting the incoming 10MHz reference signal level and a filter to restore the wave shape back to a sine before presenting it to the OCXO's output at just the right level to effect injection locking without the risk of nulling the output or stalling the OCXO's oscillator, this additional complication seems a small price to pay for what should be a more universally applicable solution. Until I actually try out some experimental circuits, this remains a matter of speculation on my part for now.

JBG
 

Offline Johnny B Good

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 My 'speculation' was in regard of the actual implementation of phase locking an internal 10MHz reference clock to an external atomic standards derived 10MHz ref (eg GPSDO) rather than it being a possible alternative. Searching the internet for 'Prior Art', I came across this 9 year old PDF article based on phase locking a now 40 year old HP 10811A oven-controlled voltage controlled crystal oscillator (OCVCXO), to be found here:

http://www.stable32.com/A%2010%20MHz%20OCVCXO%20and%20PLL%20Module.pdf

The HP10811A being Old Skool looks extremely dated by today's standards as, indeed does the 9 year old PLL add-on circuitry (thank Ghod for 3,3v OCXOs and 74HC4046A PLL ICs :) ) and provides no automated means of transitioning between free running and locked to the external reference, relying as it does on the use of a jumper or change-over switch. As it is based on a PLL, it will provide a glitch free transition regardless of this.

 Getting this idea to fly with modern day 10 or 20MHz OCXOs of any type using a 74HC4046A (with a 74HC74 dual D type flip flop to divide the 20MHz down to 10MHz) is fairly trivial. The only complication being the extra circuitry to isolate the PLL from the EFC circuit in the absence of a valid 10MHz external reference to allow the OCXO to free run, unmolested by any invalid PLL output.

 If your internal 10MHz reference is a cheap TCXO, the injection locking technique will probably be the better choice in this case and almost certainly the best in the case where the even cheaper option of a separate crystal wired to a logic gate biased to provide the necessary feedback gain has been employed (including the type of oscillators to be found in many amateur transceivers using a discrete transistor or two where it can take the form of a short 1cm probe antenna poking into the screened enclosure of the oscillator).

 These latter two cases could be phase locked if you're prepared to add a varactor diode and resistor to the oscillator circuit to provide voltage control over their frequency. Of course, all this complexity can be avoided if your device can cope with brief interruptions or disruptions to its internal clock reference from the simple use of a change-over switch between the internal and external clock sources.

JBG
 


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