General > General Technical Chat
Is this product a BS didn't it?
newbrain:
--- Quote from: sandalcandal on October 18, 2021, 06:36:07 am ---A few hours per cable seems excessive.
--- End quote ---
It depend on the needs.
If you need to have a BER (bit error rate) estimation with a good confidence level, the time grows very fast if you have no errors on a fast interface.
If you want to be 95% sure that BER is less than 1 in 10^12 (the standard value for 10G Ethernet), you need to transmit:
10^12 × -ln(1-0.95) ~= 3 × 10^12 bit
On a 10 Gb/s interface that is just 5 minutes, but as soon as one needs better BER or CL, the time goes up, e.g. for 10^-14 BER, 99% CL we are up to more than 12 hours!
sandalcandal:
--- Quote from: newbrain on October 18, 2021, 07:21:39 am ---
--- Quote from: sandalcandal on October 18, 2021, 06:36:07 am ---A few hours per cable seems excessive.
--- End quote ---
It depend on the needs.
If you need to have a BER (bit error rate) estimation with a good confidence level, the time grows very fast if you have no errors on a fast interface.
If you want to be 95% sure that BER is less than 1 in 10^12 (the standard value for 10G Ethernet), you need to transmit:
10^12 × -ln(1-0.95) ~= 3 × 10^12 bit
On a 10 Gb/s interface that is just 5 minutes, but as soon as one needs better BER or CL, the time goes up, e.g. for 10^-14 BER, 99% CL we are up to more than 12 hours!
--- End quote ---
Well I can't deny that's the "proper" way to directly validate BER [for a complete transmitter-receiver system]. I was thinking about for quick partial validation a look at the eye diagram seems more common though I haven't done signal processing stuff since undergrad.
Tektronix app note on using eye diagrams for BER https://download.tek.com/document/65W_26019_0_Letter.pdf
Edit: Dug out the slide from the photonics course I took at ANU. A formula was given for calculating BER from eye diagram reading assuming Gaussian noise.
Edit2: Also assuming decision point and decision levels for the receiver.
tszaboo:
--- Quote from: eti on October 18, 2021, 06:48:17 am ---
--- Quote from: wraper on October 18, 2021, 06:12:17 am ---
--- Quote from: eti on October 17, 2021, 09:42:43 pm ---As clever as Linus is, he is NOT an electronics or test eqt channel, and were I him, I'd surely delegate that kind of approval to someone live Dave, or countless members here.
--- End quote ---
And what equipment Dave has to make such measurements? Not to say some specialized tool which will do it very fast and hassle free. What incentive he has to spend time on this to begin with?
--- End quote ---
Dave is an EXTREMELY experienced, qualified electronic engineer with many decades of experiences, whereas Mr Sebastian is a youngster, and with all respect, a bloke that plugs modules together and tests them - and yes that is a job requiring experience, but unless I am lacking info regarding Mr Sebastian, he IS NOT an electronics engineer (I've seen plenty of times where he appears rather clumsy in his videos - either he IS, or intends to portray that image... although... WHY he'd want to do so is baffling)
Your open-ended Q regarding Dave's "incentive" et cetera... sorry, but what? I am confused as to what you want to know - a rather poorly worded question?
--- End quote ---
You don't need to be an EE to test a cable.
The equipment generates a test report, and he was focusing on the Pass/Fail aspect of it. That is a lab technician job, the qualifications for those are high school diploma.
--- Quote from: EEVblog on October 18, 2021, 06:30:41 am ---Watched a bit of it.
Doesn't look like signal integrity measurement to me. So likely just packet error testing.
--- End quote ---
Thanks for posting this picture.
I think it is using the MAX3987
8.5Gbps Quad Equalizer and Preemphasis Drive
The package, high speed signals pinout seems to match.
EEVblog:
--- Quote from: sandalcandal on October 18, 2021, 06:38:50 am ---User manual here: https://www.totalphase.com/support/articles/360023273894-Advanced-Cable-Tester-v2-User-Manual
Shows screenshot the eye diagram based signal integrity check.
--- End quote ---
Seems to claim signal integrity.
--- Quote ---http://A complete battery of tests is performed when a cable is plugged in. These tests include:
Continuity/Wiring - cable specific and customizable
DC Resistance - pin and wire measurements, Rd, Rp, Ra, and more
Signal Integrity - configurable from 518 MHz to 12.8 GHz on up to 5 differential pairs
E-Marker Verification - PD2/PD3 verification
Apple MFi Mandated Tests - Over Voltage Protection, Quiescent Current, Source Measurement Unit Tests
--- End quote ---
--- Quote ---http://Table 10 : Signal Integrity Test Report
Data Rate Speed of the data signal used in the test in Mbits per second
Transmit Pair Transmitter plug and pins
Receive Pair Receiver plug and pins
HEO Horizontal Eye Opening is a percentage value that indicates what percentage of the reference frame of the eye is open across the widest section. The Expected is the minimum open percentage that will pass the test and is generated based on the insertion loss curve specified in the test profile. The Measured is the actual percentage open.
VEO Vertical Eye Opening is a percentage value that indicates what percentage of the reference frame of the eye is open across the widest section. The Expected is the minimum open percentage that will pass the test and is generated based on the insertion loss curve specified in the test profile. The Measured is the actual percentage open.
Eye Image If lock was achieved on the indicated differential pair, the eye image will be displayed. The eye image will include the mask to provide a reference for the HEO and VEO values.
If lock was not achieved, a no-lock image will be displayed.
--- End quote ---
Kinda sounds like it might not be a real high speed ADC measurement, but more of an implied result based on comparator threshold measurements maybe?
At the claimed 12.8GHz you'd need some insanely fast ADC stuff to get a real time eye diagram. I'm not seeing that capability on that board.
And then you have that internal board to board connection for the various modules.
sandalcandal:
--- Quote from: EEVblog on October 18, 2021, 11:07:19 am ---Kinda sounds like it might not be a real high speed ADC measurement, but more of an implied result based on comparator threshold measurements maybe?
At the claimed 12.8GHz you'd need some insanely fast ADC stuff to get a real time eye diagram. I'm not seeing that capability on that board.
And then you have that internal board to board connection for the various modules.
--- End quote ---
I don't think there's any need for a full 12.8GHz real time sampling ADC for testing signal integrity through a cable like this device is doing. Particularly since you are generating the reference signal locally; you know the exact phase and amplitude of the input to the cable. There's additionally plenty of signal processing methods which can take advantage of the fact the eye diagram isn't real-time and can be aggregated from many controlled samples over a minute (or maybe even longer).
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