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Memories, lest we forget
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tggzzz:
The first computer I used had an architectural maximum of 8192 words, each with 39 bits. Some machines shipped with 4096 words. You can still see and hear one running, an Elliott 803 at Teh National Museum of Computing.

The memory was extremely expensive, since each bit was hand made by women ("because they are more dextrous"). I was once offered a job that was something to do with making these memoriies, but the 1kbit DRAMs were clearly the future.

So, what did they look like? I recently bought a cheap and nasty sucking red hot poker, so I've finally got around to desoldering one.

Here's a 1kbit memory from a1972 Olivetti computer. It was originally mounted on its own circuit board, and a single randomly selected bit could be (destructively) read at a time. Writing it back was a separate operation, just like it is with a modern DRAM.



And this is what several bits look like:



The horizontal and vertical wires are the row and coumn wires that select a single core for reading or writing. The diagonal green wire is the sense wire that goes though all cores.

I'll leave anybody interested in the details to do a little googling; I'm not going to (poorly) repeat good material!
bd139:
Thanks for posting this   :-+

Nice to see some original vintage computing posts  :-+
SiliconWizard:
What were the typical read and write times?
I wanted a rude username:

--- Quote from: SiliconWizard on May 02, 2020, 01:54:25 pm ---What were the typical read and write times?

--- End quote ---

> Early core memory systems had cycle times of about 6 µs, which had fallen to 1.2 µs by the early 1970s, and by the mid-70s it was down to 600 ns (0.6 µs). Some designs had substantially higher performance: the CDC 6600 had a memory cycle time of 1.0 µs in 1964, using cores that required a half-select current of 200 mA. Everything possible was done in order to decrease access times and increase data rates (bandwidth), including the simultaneous use of multiple grids of core, each storing one bit of a data word. For instance, a machine might use 32 grids of core with a single bit of the 32-bit word in each one, and the controller could access the entire 32-bit word in a single read/write cycle.
(from Wikipedia, of course)

Note that, since reading a bit erases its contents, each read must be followed by a re-write if the value is to be maintained. I believe that, at least in the case of computers, this was generally handled by the memory controller and not the CPU ... but I'm not sure if this would be included in the stated cycle time.
SiliconWizard:
Still, not too bad actually at the time!
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