General > General Technical Chat
Missing row labels in BGA package datasheets? Why?
Sehyung:
I had a same question and found JEDEC standard that describe the conventions and leave here for anyone who had the same curiosity.
https://www.jedec.org/sites/default/files/docs/SPP-010.pdf
gnuarm:
--- Quote from: MarkS on February 05, 2017, 07:02:48 pm ---One more question. With SIP, DIP and quad packages everything is referred to as a "pin". Does this naming convention still apply to ball grid, pin grid and land grid array packages? Is the grid position "J5" referred to as pin "J5" or ball/pin/pad/land "J5"?
--- End quote ---
Your tool is not defining the part, it is defining a footprint, no? I would call them pads.
Is the tool going to provide any breakout assistance? I am new to KiCAD, so I'm not familiar with how breakout could be improved or facilitated. One of my issues with my current layout tool is FPGAs are happy to allow pin swapping. But if you route a signal from both ends to find it is easier to swap two pins (or more), make the changes in schematic and import it to the layout tool and the traces are ripped up so you have to start those routes over. If the breakout was somehow part of the footprint this might be more simple.
gnuarm:
--- Quote from: Sehyung on January 29, 2021, 01:55:28 pm ---I had a same question and found JEDEC standard that describe the conventions and leave here for anyone who had the same curiosity.
https://www.jedec.org/sites/default/files/docs/SPP-010.pdf
--- End quote ---
Can you provide your login information?
nctnico:
--- Quote from: gnuarm on January 29, 2021, 08:56:12 pm ---
--- Quote from: MarkS on February 05, 2017, 07:02:48 pm ---One more question. With SIP, DIP and quad packages everything is referred to as a "pin". Does this naming convention still apply to ball grid, pin grid and land grid array packages? Is the grid position "J5" referred to as pin "J5" or ball/pin/pad/land "J5"?
--- End quote ---
Your tool is not defining the part, it is defining a footprint, no? I would call them pads.
Is the tool going to provide any breakout assistance? I am new to KiCAD, so I'm not familiar with how breakout could be improved or facilitated. One of my issues with my current layout tool is FPGAs are happy to allow pin swapping. But if you route a signal from both ends to find it is easier to swap two pins (or more), make the changes in schematic and import it to the layout tool and the traces are ripped up so you have to start those routes over. If the breakout was somehow part of the footprint this might be more simple.
--- End quote ---
I don't think it is a good idea to make the breakout part of the footprint. First the size of the via is determined by what the PCB manufacturer can produce. Some like a bigger anular ring, others like a larger hole. Second if a pin isn't connected a via just takes space which can be put to better use. The CAD tool I use links a BGA breakout to the part at the design stage of the board.
amyk:
--- Quote from: MarkS on February 05, 2017, 07:02:48 pm ---One more question. With SIP, DIP and quad packages everything is referred to as a "pin". Does this naming convention still apply to ball grid, pin grid and land grid array packages? Is the grid position "J5" referred to as pin "J5" or ball/pin/pad/land "J5"?
--- End quote ---
With a PGA they are obviously still pins, but with BGA and LGA, not so much --- if you really want to be generic, call it a contact.
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