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Quick TVS diode question. Vclamp < Vbreakdown
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T3sl4co1l:
The... TL431 and switch, it's being used as a comparator?
kellogs:
Err... right! Already over my head. How about this other one - trying to protect the FETs Q2 and Q3 with a kit for reverse spikes made of

Q1 (a and b) R1 (a and b) R1 and D1. Normally each of the Q1 should carry around 1A.

A positive spike (up to 150V per ISO) will either pass through Q1 and Q3 ending up at R2 and at the lamp if it happens when it is already lit
A positive spike (up to 150V per ISO) will either pass through Q1 ending up at Q2 ad Q3 when the lamp is not already lit

A negative spike (up to 220V per ISO) will always be clamped by the Q1 D1 R1 kit in some, perhaps, 10us then be kept at Q1 drains.

MCU branch of the circuit, due to its low current draw, has its own protective circuitry consisting of fast TVS and rectifier diodes + limiting resistor.

Taking care at the P-FETs for rds_on and current, does this stand a chance in real life ?

Thanks!


T3sl4co1l:
Not sure about your definition of "spike" here: those PMOS might be 10nF+ equivalent, so that 47k gives a time constant of some 470us, not 10!  But that's easily solved with a diode clamp from GND to G.  Maybe with a clamp diode to S as well, to avoid dumping surge current through the 6.8V zener there, or a (much smaller) limiting resistor on said clamp diode (>10 ohm?).

Likewise Q3 seems to be exceeding Vgs(max).  Just an oversight I guess.

Adding a separate path for an MCU is a poor idea for both efficiency and EMC, but I suppose can be done.

Tim
kellogs:

--- Quote from: T3sl4co1l on September 10, 2022, 09:50:03 pm ---
Adding a separate path for an MCU is a poor idea for both efficiency and EMC, but I suppose can be done.

Tim

--- End quote ---

I'll deal with that later :)

I so wanna use one N channel  MOSFET instead of these parallel high Rds_on P-MOSFETs for the negative spikes protection

They say:



These gate driver ICs seem to all have this drawback - they are tied to V_in = 12V, the one I am trying to protect my circuitry from. As far as I can tell, not an option without a never ending rabbit hole.

Solution: a charge pump which has V_in = 5V already protected from MCU side of circuit. PWM will come form MCU as well, +5 / 0V



I don't get it... is the pump above supposed to charge C20 to, what, 3x Vcc - 6x Vf ? I think it does not. How do I charge the final cap to 4 or 5 times Vcc ?

Oh, and... how to protect Q3's GS junction ?  :-[
T3sl4co1l:
Don't make an absolute rail, make a relative rail.

For example, use a gate driver supplied from +12V (or since not much current should be required here, a CD4xxx gate would also do), make a square wave say of some 10s to 100s kHz, and connect a capacitor in series from its output to the middle of a series diode pair, anode to source, cathode to +12BS (bootstrap).  Also put a zener from S to +12BS to drain extra current in case the charge pump is doing "too well" (mainly due to voltage swing on the source).

Level shifting is required, for which a regular bootstrap type driver (IR2101 etc.) is fine, leave the low-side channel pulled to GND (or, use it to power the charge pump!) and drive the high side from logic.

But this is a lot of bother when you can just get an LT surge stopper chip ready to go or whatever.  They're spendy but that's a lot of faffing around you save.



--- Quote from: kellogs on September 11, 2022, 06:29:30 pm ---Oh, and... how to protect Q3's GS junction ?  :-[

--- End quote ---

The... same way Q1 is??

Tim
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