I am distracted and fail to notice
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
My own peeve with datasheets is when the dimensions are not fully labeled and they have just the bare minimum from which I can extrapolate the rest of the measurements relative to the information I am given. It is super irritating to have to go through the extra mental gymnastics, greatly increasing the chance of error.
Yesterday I assembled and started testing a 30W power supply I designed for use with a radar system computer. And guess what? Some of the MOSFETs were mirrored! With the result that the power supply shorted out!
I've seen worse, an IC available in two different packages with the same number of pins but different pin numbers, so changing the package without changing the symbol would result in the wrong pin out
I'm sympathetic to the OP. When designing a board requiring lots of new part library entries it's easy to screw things up and the "is it top or bottom view" thing has caught me before, too. Although tangentially related, take a look at the attached excerpt from a CUI DC power jack datasheet which shows one of the worst attempts I've seen in recent memory to draw a component package.
a CUI DC power jack datasheet which shows one of the worst attempts I've seen in recent memory to draw a component package
Apart from that, your design review process is (a) ineffective and (b) doesn't improve in the light of experience. That's the second thing you should fix.
Apart from that, your design review process is (a) ineffective and (b) doesn't improve in the light of experience. That's the second thing you should fix.
Ah, I agree. Mirrored footprints can be pretty tough to spot though, unless it's specifically part of the routine checks that are done through your design reviews (which is more often than not, not!)
Specifically for PCB footprints (and generally speaking, CAD parts), I've found that setting a specific review for them (generally speaking, a design review on CAD libraries) was a good idea. The key process there should be that no layout can start on a given board if the parts that have been created for this specific project haven't been reviewed first. If you make it part of the general design review, it's a safe way of overlooking that IME. Most teams will focus on the schematics, and then next on the placement and next, routing. A specific showstopper phase for libraries works better.
Quotea CUI DC power jack datasheet which shows one of the worst attempts I've seen in recent memory to draw a component package
What's the problem with that specifically?
How about: what are the coordinates for the locating pins?
I know that you can put PTH devices on the other side of the board, because I saw someone have to do that 30 years ago. The draft pre-production documentation had the devices drawn from the PoV of the chip designers, not the board designers.