If it wasn't for Intel insisting that ECC DRAM was an "enterprise feature" and making it impossible or unnecessarily costly to implement for consumer CPUs, it would be used in every PC.
The real cost is in system validation with the BIOS and operating system. At least AMD allows it even if unsupported in most cases. Unfortunately for whatever reason, AMD disables ECC on their CPUs that have built in graphics, at least up until recently, except for the Pro versions which are not generally available. When I built my little server, I could have bought a Pro CPU from the Chinese grey market, but the increased cost was about the same as a cheap graphics card for a server which normally has no monitor, so I did that.
As the size of each individual bit in a memory chip gets smaller and smaller, the chance that a bit flip might happen increases.
Whether a bit is affected depends on the density of the charge rather than the amount. The ionizing radiation strike distributes charge across a large volume, so if the bits are physically smaller, they pick up less charge. DRAM designs have improved density by storing equal or slightly less charge in smaller volumes, so the charge density goes up for each bit and it become less susceptible. In practice the result has been that radiation susceptibility leveled off several DRAM generations ago for a given amount of RAM, but of course system memory requirements still increased so systems do become more vulnerable, just not nearly as much as originally expected.
My TrueNAS has ECC DRAM and I wouldn't even think of building one without it. I also based it on an AMD CPU for this generation of the hardware as I didn't want to pay Intel's premium for something which is an essential feature.
The last Intel system I built for myself with ECC was a Pentium 4, which I still have. Everything since has been AMD because of better ECC support. I tried figuring out what I needed to build an Intel ECC system a couple years ago when I built my Ryzen workstation, and it was too complicated and questionable, and the Intel system would have doubled the cost of the motherboard. High AMD motherboard prices became reasonable compared to even higher Intel motherboard prices.
I read somewhere that ECC is a standard feature of DDR5, has there been any independent verification that's actually the case for all DDR5?
It is, and it is not. All DDR5 uses ECC internally to provide a limited amount of protection, but errors are only corrected when data is read out, and no scrubbing takes place. This has to be the case because scrubbing every time that a row is opened would cost too much power. How often rows can be opened is already limited by power concerns.
Normal DDR5 implements two 32-bit memory channels per DIMM, but ECC DDR5 implements two 40-bit memory channels per DIMM, which has nothing to do with the internal ECC protection. I assume this means the chips will be 8-bits wide so one channel takes either 4 or 5 chips, and a single rank DIMM will use 8 or 10 chips.
But who is crazy enough to put a NAS on internet? I mean that in itself is a big no. And chances are there will be more security issues with your self build PC based NAS compared to an off-the-shelve product which should have a minimal attack surface to begin with. IF you need remote access to a NAS, do this via a VPN router / VPN client.
Some people are dumb, inexperienced, or desperate enough to expose the Remote Desktop Protocol or SMB port so that they can reach their system remotely. A VPN is definitely the way to go, and is what I have always done in the past.
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