Author Topic: Say a weekend project idea, something nice to build  (Read 4280 times)

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Offline RoGeorgeTopic starter

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Say a weekend project idea, something nice to build
« on: May 09, 2024, 07:43:20 am »
What would that be?

Offline Nominal Animal

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Re: Say a weekend project idea, something nice to build
« Reply #1 on: May 09, 2024, 03:24:47 pm »
A fire.

No, really.  Fry some sausages or marshmallows, look at the fire, and relax.
 
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Online MK14

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Re: Say a weekend project idea, something nice to build
« Reply #2 on: May 09, 2024, 04:06:33 pm »
Connect together a set of suitable LEDs, and your favorite/in-stock microcontroller board, to make a relaxing and pleasant fire simulator, flashing pattern.

For Inspiration:






 
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Online Zeyneb

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Re: Say a weekend project idea, something nice to build
« Reply #3 on: May 09, 2024, 04:44:51 pm »
Maybe your car needs an oil change, how about DIY?

EDIT: I think MK14s post would be more suitable for the Southern Hemisphere citizens at this time.
« Last Edit: May 09, 2024, 05:06:29 pm by Zeyneb »
goto considered awesome!
 
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Offline Nominal Animal

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Re: Say a weekend project idea, something nice to build
« Reply #4 on: May 09, 2024, 06:50:48 pm »
If you have WS2812 or similar programmable RGB leds, and a microcontroller with N×M×2+768 bytes of RAM, you can do some really nice fire and plasma effects.

The idea is that you use a good pseudorandom number generator as a seed in suitable cells.  I recommend using the 32 or 40 high bits of Xorshift64*, e.g.
Code: [Select]
#include <stdint.h>

// Any nonzero 64-bit seed will work; randomize it!
uint64_t  prng_state = 1;

// Cache for 8-bit pseudorandom numbers.
uint8_t   prng_cache[4];
uint8_t   prng_cached = 0;

// Obtain a random number between 0 and 255.
uint8_t   prng_u8(void)
{
    if (prng_cached > 0)
        return prng_cache[--prng_cached];

    uint64_t  x = prng_state;
    x ^= x >> 12;
    x ^= x << 25;
    x ^= x >> 27;
    prng_state = x;

    x = (x * UINT64_C(2685821657736338717)) >> 24;

    prng_cache[0] = x;
    prng_cache[1] = x >> 8;
    prng_cache[2] = x >> 16;
    prng_cache[3] = x >> 24;
    prng_cached   = 4;

    return x >> 32;
}
You declare two buffers and an RGB look-up table:
Code: [Select]
#define  N  //rows, vertical
#define  M  //columns, horizontal

typedef struct {
    uint8_t  cell [N][M];
} grid;

grid  g[2];

uint8_t  rgb[256][3];
For each inner cell, you apply a 3×3 kernel, centered on the cell, with the weights summing to 257 (or less if you want dimming).
Code: [Select]
const uint8_t  kernel[3][3] = { ... };

void apply(grid *const dst, grid *const src, const uint8_t flicker, const uint8_t bias)
{
    const uint_fast16_t  cmin =  (uint_fast16_t)flicker * (uint_fast16_t)bias;
    const uint_fast16_t  cmax = (uint16_t)( -(uint_fast16_t)flicker * (uint_fast16_t)(255 - bias) );

    for (uint_fast8_t n = 1; n < N-1; n++) {
        for (uint_fast8_t m = 1; m < M-1; m++) {
            uint16_t c = (uint_fast16_t)(kernel[ 0 ][ 0 ]) * (uint_fast16_t)(src->cell[ n-1 ][ m-1 ])
                       + (uint_fast16_t)(kernel[ 0 ][ 1 ]) * (uint_fast16_t)(src->cell[ n-1 ][ m   ])
                       + (uint_fast16_t)(kernel[ 0 ][ 2 ]) * (uint_fast16_t)(src->cell[ n-1 ][ m+1 ])
                       + (uint_fast16_t)(kernel[ 1 ][ 0 ]) * (uint_fast16_t)(src->cell[ n   ][ m-1 ])
                       + (uint_fast16_t)(kernel[ 1 ][ 1 ]) * (uint_fast16_t)(src->cell[ n   ][ m   ])
                       + (uint_fast16_t)(kernel[ 1 ][ 2 ]) * (uint_fast16_t)(src->cell[ n   ][ m+1 ])
                       + (uint_fast16_t)(kernel[ 2 ][ 0 ]) * (uint_fast16_t)(src->cell[ n+1 ][ m-1 ])
                       + (uint_fast16_t)(kernel[ 2 ][ 1 ]) * (uint_fast16_t)(src->cell[ n+1 ][ m   ])
                       + (uint_fast16_t)(kernel[ 2 ][ 2 ]) * (uint_fast16_t)(src->cell[ n+1 ][ m+1 ])
                       ;
            if (c >= cmin && c <= cmax) {
                c = c - cmin + prng_u8() * uint_fast16_t)flicker;
            }
            dst->cell[n][m] = c >> 8;
        }
    }
}
You need two grids,
    grid g, gtemp;
Initialize the main one to all zeros, set the seed cell values using the prng_u8() function, and apply the kernel twice,
    apply(gtemp, g, 0, 128);
    apply(g, gtemp, 0, 128);
The flicker term is how much randomness is added to each cell, and bias is whether it tends to increase (<128) or decrease (>128) the cell value.

Now you have the updated state in the main grid, and you can sample specific cells for your RGB LEDs, using the RGB look-up table rgb[g.cell[row][column]][0..2] for red, green, and blue components for that LED, respectively.  You can also do a number of apply() rounds before updating the LEDs.

My favourite is using a regular triangular grid for the LEDs, with relatively large grids.

If you use a RAM-based kernel, you can adjust it in real time, skewing it to a side, creating changing "draft".  Bias it completely towards one side to get drifting plasma/fire.

The possibilities are very nearly limitless, and it is easy to get going and some nice results, while genuine-looking fire takes careful tuning and experimentation.  :-+
« Last Edit: May 09, 2024, 06:59:34 pm by Nominal Animal »
 
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Offline Halcyon

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Re: Say a weekend project idea, something nice to build
« Reply #5 on: May 10, 2024, 07:41:05 am »
A visual system to identify the presence of cats and spray them with a water jet, so they stop peeing in my front yard.
 
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Offline RoGeorgeTopic starter

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Re: Say a weekend project idea, something nice to build
« Reply #6 on: May 10, 2024, 09:04:18 am »
A visual system to identify the presence of cats and spray them with a water jet, so they stop peeing in my front yard.

Try cucumbers in your front yard.  ;D

 
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Offline JPortici

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Re: Say a weekend project idea, something nice to build
« Reply #7 on: May 10, 2024, 09:09:38 am »
A visual system to identify the presence of cats and spray them with a water jet, so they stop peeing in my front yard.

That's usually called a dog
 
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Offline Zoli

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Re: Say a weekend project idea, something nice to build
« Reply #8 on: May 11, 2024, 06:28:11 am »
A visual system to identify the presence of cats and spray them with a water jet, so they stop peeing in my front yard.
I remember reading something like this in an nvidia engineer blog a few years ago(ML, RPi, cameras & automation involved, IIRC).
 

Offline RoGeorgeTopic starter

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Re: Say a weekend project idea, something nice to build
« Reply #9 on: May 11, 2024, 07:43:21 am »
A visual system to identify the presence of cats and spray them with a water jet, so they stop peeing in my front yard.

That's usually called a dog

An electronic dog would be a nice build.  Might take longer than a weekend.  Anybody has the schematics for this one?



Maybe the schematic is shown somewhere in the movie, will watch this for now:  https://youtu.be/0S-sBIOZWMQ  :D
« Last Edit: May 11, 2024, 07:52:38 am by RoGeorge »
 

Offline nali

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Re: Say a weekend project idea, something nice to build
« Reply #10 on: May 11, 2024, 08:09:54 am »
A visual system to identify the presence of cats and spray them with a water jet, so they stop peeing in my front yard.

I thought this was the Aussie approach..?

 
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Offline Nominal Animal

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Re: Say a weekend project idea, something nice to build
« Reply #11 on: May 11, 2024, 02:39:45 pm »
A visual system to identify the presence of cats and spray them with a water jet, so they stop peeing in my front yard.
Citrus mister?

In truth, I think it is like trying to get back at divebombing seagulls by spiking snacks with high-Scoville chili sauce: birds' capsaicin pain receptors are very weak, so they just don't mind.  Trying to convince the local cat colony that your front yard is a no-peemail zone is as futile, unless you're some kind of cat whisperer.  Making it their fresh water drinking spot might have better chances of success than cat repellent plants, I reckon, exploiting their tendency to keep their food and water sources clean.  Dunno; sounds like a frustrating weekend to me.  I prefer the evening fire and toasting snacks.
« Last Edit: May 11, 2024, 02:41:27 pm by Nominal Animal »
 

Online RAPo

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Re: Say a weekend project idea, something nice to build
« Reply #12 on: May 11, 2024, 03:05:27 pm »
I've built a germanium transistor tester this weekend; see this .
 
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Offline RoGeorgeTopic starter

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Re: Say a weekend project idea, something nice to build
« Reply #13 on: May 17, 2024, 08:08:23 am »
New weekend ahead!  :D
What project for this weekend?

Offline Messtechniker

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Re: Say a weekend project idea, something nice to build
« Reply #14 on: May 17, 2024, 08:34:59 am »
How about a 12 V DC distribution unit to get rid of
some larger wall warts blocking adjacent mains sockets.
Agilent 34465A, Siglent SDG 2042X, Hameg HMO1022, R&S HMC 8043, Peaktech 2025A, Voltcraft VC 940, M-Audio Audiophile 192, R&S Psophometer UPGR, 3 Transistor Testers, DL4JAL Transistor Curve Tracer, UT622E LCR meter
 
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Re: Say a weekend project idea, something nice to build
« Reply #15 on: May 17, 2024, 10:08:50 am »
I've very little time, but hopefully there is enough time for a .
 
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Offline RoGeorgeTopic starter

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Re: Say a weekend project idea, something nice to build
« Reply #16 on: May 17, 2024, 10:22:45 am »
Gyrators are always fun and interesting to play with, indeed, that reminds me of a nice 101 article I've read last year from the Elektor Magazine #2/1975:

How to gyrate - and why
https://archive.org/details/ElektorMagazine/Elektor%5Bnonlinear.ir%5D%201975-02/page/n49/mode/2up
 
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Offline joeqsmith

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Re: Say a weekend project idea, something nice to build
« Reply #17 on: May 17, 2024, 01:00:07 pm »
What would that be?

I wonder what the average time frame is.  Most of my home projects seem to take about a week.  Some are years in the making.  Because I tend to work on things that I have no background in, they often require learning several areas.  For me, the construction and seeing it work (if it does) isn't as much fun as learning new things.   
 
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Offline RoGeorgeTopic starter

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Re: Say a weekend project idea, something nice to build
« Reply #18 on: May 17, 2024, 01:52:08 pm »
I wonder what the average time frame is.

Doesn't matter much, anything would do.  Ideal time frame would be a weekend (something between 2-20 hours total?), or at least to have some standalone partial result that can be enjoyed the same weekend.

Online Zeyneb

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Re: Say a weekend project idea, something nice to build
« Reply #19 on: May 17, 2024, 03:14:57 pm »
Isn't this a wholesome DIY repair situation?

https://www.youtube.com/shorts/7Fw7bZoPyVU
« Last Edit: May 17, 2024, 03:18:42 pm by Zeyneb »
goto considered awesome!
 
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Offline linux-works

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Re: Say a weekend project idea, something nice to build
« Reply #20 on: May 17, 2024, 03:17:22 pm »
if in doubt, build a clock.

(arduino makes it easy)
 
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Offline RoGeorgeTopic starter

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Re: Say a weekend project idea, something nice to build
« Reply #21 on: May 18, 2024, 02:52:06 pm »
The clock I would like to build would be one that randomly advances, I mean it "ticks" driven by the movement of a double articulated pendulum, something like this:



Of course, the double pendulum arm will have to be pushed a little, here and there, to replenish the energy lost by friction in the pendulum articulations.  Then, some electronic that senses the movement and count the minutes and hours.

I'm not sure if a clock based on randomness would be able to keep the time at all, or if it will behave like a random walk, and the longer it runs the bigger the error it accumulates.  I suspect it should be able to keep track of time in the long run.  ::)

Online RAPo

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Re: Say a weekend project idea, something nice to build
« Reply #22 on: May 18, 2024, 03:46:43 pm »
Beware of the equilibrium points, for a triple articulated pendulum see this .



The clock I would like to build would be one that randomly advances, I mean it "ticks" driven by the movement of a double articulated pendulum, something like this:



Of course, the double pendulum arm will have to be pushed a little, here and there, to replenish the energy lost by friction in the pendulum articulations.  Then, some electronic that senses the movement and count the minutes and hours.

I'm not sure if a clock based on randomness would be able to keep the time at all, or if it will behave like a random walk, and the longer it runs the bigger the error it accumulates.  I suspect it should be able to keep track of time in the long run.  ::)
 

Offline RoGeorgeTopic starter

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Re: Say a weekend project idea, something nice to build
« Reply #23 on: May 18, 2024, 05:39:57 pm »
Cool!  :-+
There is also a way to do about the same with a jig-saw.  ;D

Self-correcting Inverted Pendulum Defies Gravity
The Action Lab

 
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Offline joeqsmith

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Re: Say a weekend project idea, something nice to build
« Reply #24 on: May 18, 2024, 06:19:49 pm »
Day1 is done.  Lets see your progress.

Offline RoGeorgeTopic starter

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Re: Say a weekend project idea, something nice to build
« Reply #25 on: May 18, 2024, 08:24:34 pm »
Day1 is done.  Lets see your progress.

I have not even started!  :scared:
For the double pendulum, I might probably not have enough mechanical skills.

This weekend I've only followed the very first advice in this thread, and relax.  Previous weekend at least I have had some interesting reading about SMBus controlled batteries, and made a few (failed) attempts to talk with such a battery that still refuses to respond (while other laptop batteries were nice enough to report their parameters by SMBus).  But this weekend, did nothing.

Anybody else happen to have some progress with their projects?  Post some pics please.
 
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Offline joeqsmith

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Re: Say a weekend project idea, something nice to build
« Reply #26 on: May 18, 2024, 08:52:24 pm »
Assuming you only have two days, the clocks ticking.

Today I punched out some shims for an experiment I have been working on.
https://www.eevblog.com/forum/rf-microwave/experimenting-with-waveguides-using-the-litevna/msg5506135/#msg5506135

Looking back one year, you can see how seemingly little progress has been. 
https://www.eevblog.com/forum/rf-microwave/experimenting-with-waveguides-using-the-litevna/msg4880348/#msg4880348
 
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Offline joeqsmith

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Re: Say a weekend project idea, something nice to build
« Reply #27 on: May 20, 2024, 02:27:09 pm »
Ok, it's been a full weekend.  Lets see the end result. 

Offline RoGeorgeTopic starter

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Re: Say a weekend project idea, something nice to build
« Reply #28 on: May 20, 2024, 02:34:43 pm »
No, no, you first!  ;D

Offline joeqsmith

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Re: Say a weekend project idea, something nice to build
« Reply #29 on: May 20, 2024, 02:55:39 pm »
Hobby wise,  the only accomplishment was stamping out those shims and setting up the magnetic field for the cavity.  The majority of the weekend was spent doing yard work.   

***
Well, not quite true.  I have been jotting down ideas for a review I am planning on for Lasmux's active probes.   

https://www.eevblog.com/forum/testgear/12-ghz-active-probe-project/
« Last Edit: May 20, 2024, 02:59:45 pm by joeqsmith »
 
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Online RAPo

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Re: Say a weekend project idea, something nice to build
« Reply #30 on: May 20, 2024, 02:56:49 pm »
A video of the output of my gyrator 1ms sweep from 10Hz to 10kHz advanced xy-mode on DHO942s.


Ok, it's been a full weekend.  Lets see the end result.
 
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Online mawyatt

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Re: Say a weekend project idea, something nice to build
« Reply #31 on: May 20, 2024, 03:26:31 pm »
How about a Chaotic Circuit like this, where the two Centroids are Lorenz Attractors.

One can replace the inductor with a Gyrator like we did back in 80s when we were playing around with this for use as an Analog Encryption circuit, Attractors were the "Analog Encryption Keys".

Best,
Curiosity killed the cat, also depleted my wallet!
~Wyatt Labs by Mike~
 
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Online RAPo

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Re: Say a weekend project idea, something nice to build
« Reply #32 on: May 20, 2024, 03:47:34 pm »
Nice work! My real goal is something similar but way more complex: to show 3D-homoclinic bifurcations.
In 1989 I did the [url=https://www.cambridge.org/core/journals/ergodic-theory-and-dynamical-systems/article/homoclinic-points-and-moduli/B78AF9D2DF3B959AB41DA34671B979A0]2D case
on paper.

[/url]
How about a Chaotic Circuit like this, where the two Centroids are Lorenz Attractors.

One can replace the inductor with a Gyrator like we did back in 80s when we were playing around with this for use as an Analog Encryption circuit, Attractors were the "Analog Encryption Keys".

Best,
 

Online mawyatt

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Re: Say a weekend project idea, something nice to build
« Reply #33 on: May 21, 2024, 05:08:42 pm »
For those interested in discrete transistor design, here's an interesting adaptation of the classic Transistor Differential Amplifier. This rendition produces excellent linearity without feedback that we utilized in many of our custom IC developments many decades ago.

Best,
Curiosity killed the cat, also depleted my wallet!
~Wyatt Labs by Mike~
 
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Offline RoGeorgeTopic starter

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Re: Say a weekend project idea, something nice to build
« Reply #34 on: May 22, 2024, 06:28:05 am »
Wow, looks puzzling, thanks!  :-+

I'll have to redraw the schematic, to see if it is related with the Caprio cell.  Thinking about the Caprio cell because you mentioned very low distortions without feedback.

Online mawyatt

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Re: Say a weekend project idea, something nice to build
« Reply #35 on: May 22, 2024, 05:00:13 pm »
This is different than the Caprio Cell which employs a cross coupling technique.

Best,
Curiosity killed the cat, also depleted my wallet!
~Wyatt Labs by Mike~
 

Online mawyatt

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Re: Say a weekend project idea, something nice to build
« Reply #36 on: May 22, 2024, 06:33:46 pm »
« Last Edit: May 22, 2024, 06:35:30 pm by mawyatt »
Curiosity killed the cat, also depleted my wallet!
~Wyatt Labs by Mike~
 
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Offline RoGeorgeTopic starter

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Re: Say a weekend project idea, something nice to build
« Reply #37 on: May 23, 2024, 01:26:10 am »
For those interested in discrete transistor design, here's an interesting adaptation of the classic Transistor Differential Amplifier. This rendition produces excellent linearity without feedback that we utilized in many of our custom IC developments many decades ago.



OK, I give up!  ;D
Why does it work?

After looking closely, there's no cross-connection, indeed, so it is not like a Caprio Cell.

Seems to be just a normal differential pair (normal as in symmetric transistors, the pair in the middle of the schematic), with two more differential pairs in which the transistors are strongly asymmetric, and all the three differential pairs are connected in parallel.  I assume 13x means one transistor's area is 13 times bigger, such that the currents ratio is 13:1, right?  And the sum of all bias currents, 11xIb, has to do with the split of 13:1 in the asymmetric pairs, as 13=1+1+11.

How is that suppose to compensate for distortions?   :-//
What is the idea behind splitting the currents in that particular way?



Did some simulations, and tried different asymmetry ratios other than 13x, while keeping the same total 11xIb.



Tried 1, 7, 13 and 20, and indeed, the minimum THD happens around 13x.  Around 13x, the most reduced harmonic is the 3rd one, which is the biggest contributor to the total distortions.  Other harmonics also benefit, but the setup seems to be tuned to reduce the 3rd harmonic in particular.


First 20 harmonics when the area ratio is changed to 1, 7, 13, 20


Detail with the peaks of the 2nd, 3rd, 4th and the 5th harmonic.  Note the red line (corresponding to ratio 13) in the 3rd harmonic is the lowest color at 3kHz.

(Side note, saying around 13x because in my simulation the 13x is the scaling factor for area.  For the splitting of currents to be 13:1, the ratio of areas has to be something like 10...12:1, depending on the transistor model.  If the model is left as generic NPN, the ratio is closer to the ideal split, but for something like a 2N2222 or 2N3905 from the LTspice standard library, the area has to be about 10:1 for the currents ratio to split 13:1.  So, for a 13x current, I should have used a 2N3904 with 11x area, but the fine tuning is not relevant for now.)

- view log (CTRL+L) to inspect the calculated distortions from .fourier ... (minimum THD is for xA=13)
    THD = 1.141442%  when area ratio xA is 1
    THD = 0.106700%  when area ratio xA is 7
    THD = 0.054449%  when area ratio xA is 13  <--- minimum THD at 13:1
    THD = 0.164344%  when area ratio xA is 20

- ako:MODELname in SPICE will retrieve all the parameters of a specified model, yet each parameter can be overwritten selectively, i.e. beta was set to 200

- in the BJT model, the parameters that are scaled by changing the area are:
    IS - Saturation current
    RC - Collector resistance
    RE - Emitter resistance
    RB - Base resistance
    CJE - BE zero-bias junction capacitance
    CJC - BC zero-bias junction capacitance
    CJS - CS zero-bias junction capacitance
« Last Edit: May 23, 2024, 01:46:40 am by RoGeorge »
 

Offline RoGeorgeTopic starter

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Re: Say a weekend project idea, something nice to build
« Reply #38 on: May 23, 2024, 01:19:30 pm »
My best guess so far, the 2 asymmetric differential pairs were added to straighten the naturally S-like shaped transfer function of the normal (symmetrical) differential pair. 


Image source:  https://en.wikipedia.org/wiki/Differential_amplifier#Long-tailed_pair

Two 13:1 asymmetric pairs, each to correct one end of the S shape.

Though, I wouldn't know how to deduce the 13:1 and the 4+3+4 split of the currents, such that the resulting (combined) transfer function to become less curved.  Is there some easy way to deduce how to split the currents, or the ratios just pop out of math with no intuitive explanation?
« Last Edit: May 23, 2024, 01:26:04 pm by RoGeorge »
 

Online mawyatt

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Re: Say a weekend project idea, something nice to build
« Reply #39 on: May 23, 2024, 04:05:15 pm »
Having long since forgot how the math worked out, we had a Post Doc Student do it decades ago, and I'm too lazy!!

The concept basically takes the classic diff pair and introduces an offset by means of the area ratio (yes this is area ratio, not current) on each side of the DC transfer curve. The 13 area ratio and the 4 to 3 bias current ratios produce the lowest HD as you've shown.

If you do a DC input sweep and plot the output you will see how the added asymmetrical pairs compensate the center symmetrical pair and "stretch" the input /output linearity range over a simple diff pair. The 3rd Order IMD was almost always our major concern.

We used this and other circuits in our chip design decades ago when extreme dynamic range was in order and at very high frequencies. Imagine what could be done with ~400GHz SiGe transistors ;)

BTW glad you seem to like these circuits & such, and spend the time to dive in and understand!! 

Brings back fond memories of as a young kid (12) mowing grass, painting houses & businesses, repairing stuff, saving lunch money, gambling, whatever to took to save $ to get any test equipment we could find/afford and some tubes & Germanium transistors to build stuff. Wanted to not only look at the theoretical aspects of circuits, but "see" them perform in real life!!

@ RioGeorge with this said, you seem to be a very inquisitive person. Do yourself a favor and get a SDS800X HD, even if you have to eat rice for a month or two (we did while in grad school for a year!!). This little DSO is so darn good that in the hands of someone like yourself will open up new doors to the inner workings and exploration of complex circuits like we've been posting. Go over and look at the stuff we are doing with this here (more to come hopefully, memory is fading fast tho), the Bode and FFT functions alone are worth well more than the scope costs!! 

https://www.eevblog.com/forum/testgear/sds800x-hd-actual-use-cases/

Best,
« Last Edit: May 23, 2024, 06:19:59 pm by mawyatt »
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Re: Say a weekend project idea, something nice to build
« Reply #40 on: May 23, 2024, 05:28:35 pm »
Here's another interesting transistor circuit. This originates from the late Barrie Gilbert Micromixer replacing the transformer with a current commutating quad for the mixing operation.

The circuit fundamentally has unlimited dynamic range as a transimpedance amplifier (Vin to Iout) with ideal transistors. The inductors are for higher frequency work and help reduce noise figure, so can be bypassed for low frequency use.

Note this circuit also behaves as a "pseudo single to differential amplifier", where the input large signal polarity is "steered" to each current output and achieves such without the need for a negative supply by handling negative inputs as currents rather voltages, but without range limits (with ideal devices).

Analysis is quite involved even with such a simple circuit and also achieves a "controlled" range of input impedance as "seen" from the input driving source, an important aspect of controlling linearity at the input.

Anyway, another "fun" circuit to play around with :-+

Best

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Re: Say a weekend project idea, something nice to build
« Reply #41 on: May 23, 2024, 05:47:00 pm »
Quote
pseudo single to differential amplifier

Interesting circuit. Can I ask where you found this? Because if I search for the reference you mentioned, the only thing I find are some papers.

Edit:
Quote
For those interested in discrete transistor design

Keep em coming. I'm always interested in those things. Today all one can see are IC's talking with IC's. I find that somehow boring.
« Last Edit: May 23, 2024, 05:53:34 pm by temperance »
 

Online mawyatt

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Re: Say a weekend project idea, something nice to build
« Reply #42 on: May 23, 2024, 06:23:35 pm »
Quote
pseudo single to differential amplifier

Interesting circuit. Can I ask where you found this? Because if I search for the reference you mentioned, the only thing I find are some papers.

Edit:
Quote
For those interested in discrete transistor design

Keep em coming. I'm always interested in those things. Today all one can see are IC's talking with IC's. I find that somehow boring.

We found this way back in 80~90s and long since forgot where it came from, think it originated with Gilbert tho. We used this as a high dynamic range amplifier and mixer (with commutation).

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Offline RoGeorgeTopic starter

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Re: Say a weekend project idea, something nice to build
« Reply #43 on: May 23, 2024, 06:27:05 pm »
introduces an offset by means of the area ratio (yes this is area ratio, not current) on each side of the DC transfer curve

Indeed, I've noticed the TF is shifted, though it seems to be keeping its shape.  I suspect the S shaped TF of the differential pair is not only shaped like an S, but also a Sigmoid function in the mathematical sense.  The Sigmoid shape is one of those function with all kind of strange properties, on par with e^x or with sinusoids.  It was studied a lot recently, since the Sigmoid is the most used shape for the activation function in neural networks, but my math skills are rather low, and never followed the details about the Sigmoid function properties and implications, but I digress.

Yes, I did a brief check in LTspice, to see the difference between a symmetric and asymmetric differential, right after thinking about the approach from my post above.  It was a surprise to see the shape is preserved.  I've looked at the first derivative, too, and that also keeps its shape and symmetry, so it's not that obvious to me what is happening (in the sense that all the hypotheses I've made in advance where not confirmed in simulation).

Will post the simulation anyway, because it's an example of the syntax needed in SPICE when relative area has to be changed.  The simulation uses a SPICE feature named "ako:" (A Kind Of), about which I didn't know before.  AKO allows mass copy of all the parameters of a model, and allows changing only the parameters that need to be overridden.

AKO: is not needed to specify relative area (area is considered by models as a scaling factor, but there is no parameter named "area" in a D or Q model), in the attached example it was used to override the Bf, or to step the trace with transistor's Beta.  In the attached plots only the area ratio is changed, beta was kept 200.



Will visit the topic you linked, and BTW, it was a big need about a topic/book/series/whatever regarding measuring techniques with a recent DSO.  Last book I've seen about that was a book in Italian, and from the tubes era.  Most of the measurements shown in your topic can be applied to other DSO models, too, if not to most of them.  It is always a pleasure to read about such application, but it is so time consuming to write the material.  I have tried a couple of times, but to me it takes forever to make the pics and the text, not to say about formulas, so while it was very fun to measure, it was tedious to document the ideas, e.g.:
- https://www.eevblog.com/forum/projects/measure-a-magnets-b-field-with-a-rigol-ds1054z-oscilloscope-and-a-piece-of-wire/
- https://www.eevblog.com/forum/projects/oscilloscope-with-trace-averaging-as-a-lock-in-amplifier-(rigol-ds1054z)/

Then, after all the time spent documenting, the thread gets lost into a million other threads.  ;D
Maybe I should keep a ToC of titles where I've spent more time.  ::)
« Last Edit: May 23, 2024, 06:50:11 pm by RoGeorge »
 

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Re: Say a weekend project idea, something nice to build
« Reply #44 on: May 23, 2024, 06:37:24 pm »
Quote
Maybe I should keep a ToC of titles where I've spent more time.

That would be great. Interesting stuff and dialogues in those. (The lock in amp for example)
 
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Re: Say a weekend project idea, something nice to build
« Reply #45 on: May 23, 2024, 07:40:16 pm »
Here's an interesting modification to a simple Cascode stage that almost doubles the bandwidth with a single component and doesn't add any addition power consumption nor changes the output amplitude range significantly.

This is a simple simulation with a 2N3904 showing how a selected inductor between the Cascode stages with gain of ~10dBV and improves the BW from ~144MHz to ~265MHz.

What's happening is the shunt capacitance of the top transistor emitter is in parallel with the bottom transistor collector capacitance, this severely limits the overall stage BW. Placing an inductor separates these capacitances and forms a "pi" network with the added inductor, creating a lumped element transmission line equivalent and matching the emitter to collector.

This works, and we used such with 400GHz SiGe devices with on-chip inductors for ultra wide bandwidth applications decades ago.

Best,
« Last Edit: May 23, 2024, 07:54:05 pm by mawyatt »
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Offline RoGeorgeTopic starter

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Re: Say a weekend project idea, something nice to build
« Reply #46 on: May 24, 2024, 03:26:17 pm »
For some reason, couldn't leave behind that linearisation technique, had to come up with an intuitive explanation:



TL;DR, adding 3 shifted sigmoid-like shapes, it reduces to adding only 2, because the 3rd is almost flat when far from origin, so it doesn't change much what the middle diff pair will do anyway.  Geometrically, this is like sliding 2 parallel bars, and adding the 3 points marked 1, 2, 3.  The distance between the sliding imaginary bars had to be chosen such that the the moving bars can not fit both on the same side, or else it will worsen the linearity.

In terms of adding slopes, the same, visually is intuitive how adding the intersection between the first derivative, the plot like a hump, and the 2 bars tend to average at a more constant value than the hump variation.  Constant value here corresponds with more constant slope, which corresponds to more linear transfer function, which corresponds to less distortions.



Now, if adding shifted sigmoids reduces distortions, this means the same effect should be achieved no matter how we shift the TF.  Instead of shifting the TF with transistors of a different area, we can use normal differential pairs (transistors of the same area), and shift the transfer function with other methods.  For example with a DC bias.  ;D



 0mV - 0.292460%
 5mV - 0.287210%
10mV - 0.271911%
20mV - 0.217110%
50mV - 0.032649%   <--- min distort 0.03% (+/-50mV value comes from a brief browse, not optimized)
100mV - 0.140207%

The advantage will be that instead of (1+13) + (1+1) + (13+1) = 30 area, same effect can be achieved with 3 equal pairs, all BJT with the same 1x area, so total 6 x area instead of 30, and a 1x area BJT might be faster than a 13x area one, so higher working frequency.

If it were to have more area available, more symmetrical pairs can be paralleled to reduce the noise factor.

Another advantage of symmetrical pairs (DC shifted) is that the overall distortions are lower (at least in simulation) when compared with the same schematic implemented with asymmetrical pairs (see attached FFT detail vs previous FFT detail min THD 0.03% vs. 0.05% w asymmetrical areas).



In case the end application is at low frequency, instead of 3 differential pairs with 3 distinct DC offsets, we can use only one differential pair, and switch the other input with +/-50mV really fast.  :)



If the switching is at a much higher frequency than the signal, then the output will average the +/-50mV of "shaking", and it will be just like if it were 3 differential pairs instead of just one pair of BJT.  The shaking signal must be averaged out from the output (output must be low pass filtered in case this does not happen naturally).



Even more convenient than that, the above paragraph is nothing but addition (not modulation).  Addition can be made by simply putting the voltage sources in series, or maybe with 2 adding resistors, like in the last draft schematic from the lower right corner.

Note that a shaking made with a sinusoidal HF shaking, instead of square shaking, will still reduce distortions when compared with a normal and not shaken input signal.  (sinusoidal shaking should be easier to implement than square, analysis required for which one linearizes the amplifier better)

Both the adding of the shaking jumps in the input signal, and the low pass filtering of the output if necessary, can be applied outside of an existing amplifier.  The existing amplifier doesn't have to be modified, and doesn't have to be specially designed to include parallel differential pairs, as long as the existing amplifier has enough bandwidth for the fast "shaking" of the useful signal.  :D



In conclusion, the same core principle of adding shifted transfer functions, can be implemented either:
- by additional asymmetrical differential pairs
- by additional symmetrical differential pairs with different DC offsets
- without additional differential pairs, and instead by time-multiplexing a DC-offset overlapped to the input signal and averaging the amplifier output

First 2 methods will require specialized amplifiers, the 3rd one may be applicable to already existing amplifiers.
« Last Edit: May 24, 2024, 04:01:33 pm by RoGeorge »
 

Online mawyatt

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Re: Say a weekend project idea, something nice to build
« Reply #47 on: May 24, 2024, 04:53:54 pm »
Have you investigated unequal emitter resistors in the Triplett?

Best,
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Offline RoGeorgeTopic starter

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Re: Say a weekend project idea, something nice to build
« Reply #48 on: May 24, 2024, 05:39:49 pm »
Interesting idea, I hadn't thought of that.
« Last Edit: May 24, 2024, 05:41:43 pm by RoGeorge »
 

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Re: Say a weekend project idea, something nice to build
« Reply #49 on: May 24, 2024, 05:43:17 pm »
An old AEG info center came in. With it you can produce DTMF tones. I've never studied that before. So this weekend will be spent reading about this an Goertzel filters. Mayb there is even some time left to implement decoding DTMF on an Arduino.
 
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Online mawyatt

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Re: Say a weekend project idea, something nice to build
« Reply #50 on: May 25, 2024, 02:12:32 pm »
Here's a interesting circuit from an old article that was used on the cover of the 1992 and 93 EDN yearend booklets. Origins of this circuit date back to the development of the Serrodyne Optical Phase Modulator (patent 5339055) in some of the early Fiber Optic Gyro developments.

Best,
Curiosity killed the cat, also depleted my wallet!
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Re: Say a weekend project idea, something nice to build
« Reply #51 on: May 25, 2024, 02:27:22 pm »
Here's another circuit RoGeorge is familiar with, but others may not. This is a simple transistor current source with some unique properties. Was first published in EDN (or Electronics Design, can't remember) and long ago Walt Jung of Analog Devices altered alerted us to the Harrison's Book as shown.

Best, 
« Last Edit: May 25, 2024, 02:47:21 pm by mawyatt »
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Re: Say a weekend project idea, something nice to build
« Reply #52 on: May 25, 2024, 02:46:32 pm »
Here's another circuit, altho CMOS. The circuit uses a simple CMOS FF to divide the Clock by 2 but also the Vdd voltage by 2, almost exactly by 2 even with unbalanced resistors!!

The general idea, which was patented long ago (5030848) and won EDN Design Idea of the Year back somewhere in the 80s, is to use an ordinary CMOS Flip-Flop as a Voltage Divider, as well as the usual frequency divider. By using just two unmatched resistors, and a capacitor, with a CMOS FF it's possible to achieve ppm levels of precision almost independent of the resistor divider values. The resistors R1 and R2 are connected to the FF Q and Qbar outputs, and the capacitor C shunts the other resistors ends which are connected together, and called Vout. Neglecting FF timing and output characteristics Vout = Vdd(R2/(R1 +R2)), then on the next clock Vout = Vdd(R1/(R1 + R2)), C averages the result to precisely Vdd/2 independent of R1 or R2. The output characteristics of the FF have a small effect, as does the timing. If R1 and R2 are >> than the output Rp and Rn values (NMOS & PMOS Ron), then Rp and Rn have little effect, if the clock period is much longer than any FF timing skew (which causes duty cycle to slightly deviate from ideal 50%), then this has little effect. Interestingly a little circuit analysis shows the result with Rp and Rn included, Vout = (Vdd/2)( R1 + R2 +2Rn)/(R1 + R2 + Rn +Rp), thus is Rn= Rp then again Vout = Vdd/2.

This was simulated in LTspice and behaves as predicted by the circuit analysis.


Follow more details here:

https://www.eevblog.com/forum/projects/fun-circuit-to-play-with/

Best,
« Last Edit: May 25, 2024, 03:44:49 pm by mawyatt »
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Re: Say a weekend project idea, something nice to build
« Reply #53 on: May 26, 2024, 12:53:39 am »
Thanks, MK14;   That last video, (of the 4) posted here has the same 'Flicker Simulating' LED!   I've been playing around with a couple of flickering LED's with same plastic candle.
They do have a pleasing YELLOW light tone, and I figured likely a small processor on the LED die.
 
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Online temperance

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Re: Say a weekend project idea, something nice to build
« Reply #54 on: May 27, 2024, 01:19:54 pm »
For those interested in EDN design ideas:

https://www.edn.com/design-ideas-pdf-collections-2001-2009/

The page provides links to large PDF's containing design ideas for the years 2002 till 2009.

Edit:
@ mawyatt
Quote
Here's a interesting circuit from an old article that was used on the cover of the 1992 and 93 EDN yearend booklets.

That's why I like to read EDN design ideas. Nice idea and circuit.

Ideas like this make me feel inadequate. Oh well, some people invent calculus while others are great at putting together chicken coops at an incredible speed.
« Last Edit: May 27, 2024, 01:33:56 pm by temperance »
 
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Offline RoGeorgeTopic starter

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Re: Say a weekend project idea, something nice to build
« Reply #55 on: May 27, 2024, 01:50:07 pm »
For those interested in EDN design ideas:

https://www.edn.com/design-ideas-pdf-collections-2001-2009/

The page provides links to large PDF's containing design ideas for the years 2002 till 2009.

Nice finding, thanks, added your link to this collection:
https://www.eevblog.com/forum/projects/found-a-goldmine-looking-for-more-treasures-(hp-journal-and-alike)/

Offline magic

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Re: Say a weekend project idea, something nice to build
« Reply #56 on: May 27, 2024, 04:39:19 pm »
I have this simulation file dating back to 2022. I don't remember where I got the idea from, but I could swear that it was mentioned, suggested or alluded to by some IC designer, probably from National or Linear. It's supposed to be an effective way of improving differential pair linearity without paying the voltage noise penalty of degeneration resistors - SPICE says that voltage noise is the same as in an ordinary differential pair biased for the same transconductance. However, for the values shown below it takes 50% more bias current to reach the transconductance of a symmetric pair, hence current noise is 22% or 1.5dB higher.

The reason it works can be seen on the plot below. X axis is differential input voltage, green is differential output current, blue is differential transconductance. One symmetric pair has a narrow peak of transconductance near zero differential input voltage. Asymmetry shifts the peak away from zero, and two such peaks on opposite sides happily happen to create a wide band of almost flat transconductance around zero. The shallow valley in the center disappears when the ratio (N) is reduced to 3.73.

I'm sure there is lots of opportunity to tweak this further, with emitter resistors and even more paralleled pairs. The maths of it doesn't look trivial.
 

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Re: Say a weekend project idea, something nice to build
« Reply #57 on: May 27, 2024, 07:00:51 pm »
See post starting with #33, we were using this and the Doublet you've shown back in 80~90s, don't know where the ideas originated, but certainly was before us.

The Triplett as we've shown has the better overall linearity than the Doublet for a given input, especially 3rd order (as shown by RoGeorge), which was critical in many of our designs and why we using it more often.

The noise is the main advantage over the unbalanced emitter resistors in either the Doublet or Triplett, however at the chip level we could also get better matching with transistors than resistors, altho the Doublet offered a convenient George Erdi Cross-Couple Quad arrangement and ended up with better overall balance as could be "seen" with differential offset.

Intuitively one can visualize how the Triplett allows pushing the two unbalanced pairs further outwards wrt to differential center zero and "filling in" the middle dip of the Doublet with the 3rd balanced pair, and thus achieving better linearity within a given input span, or a wider overall span wrt to a given linearity.

Anyway, fun circuits for folks to play around with :-+

Best,
« Last Edit: May 27, 2024, 07:58:16 pm by mawyatt »
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Online mawyatt

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Re: Say a weekend project idea, something nice to build
« Reply #58 on: May 27, 2024, 07:32:06 pm »
Here's an interesting couple pages from an old notebook a couple decades ago. This is a Cherry-Hooper much simplified analysis we did to show a customer how an high dynamic range amplifier implemented in 400GHz SiGe BiCMOS achieved it's results.

These are based on "split in half" for a more simplified following, but implemented fully differential chip design. Note the implementation of "AGC" which modulated the Cherry-Hooper dual bias currents. The AGC input signal was derived from another circuit we'll try and find later.

Best,
« Last Edit: May 27, 2024, 07:36:24 pm by mawyatt »
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Offline RoGeorgeTopic starter

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Re: Say a weekend project idea, something nice to build
« Reply #59 on: May 29, 2024, 09:15:04 am »
https://www.edn.com/design-ideas-pdf-collections-2001-2009/

Found another one that straightens the transfer function:

Diode compensates distortion in amplifier stage
S Chekcheyev, Pridnestrovye State University, Moldova
https://archive.org/details/edn-design-ideas-2008/EDN_Design_Ideas_2004_/page/n106/mode/1up



Fun trick with the diode and those cross-connected capacitors.  C3 makes the D+ of the diode to be tied to GND in AC, and together with C2, they make the diode to appear "in reverse" at AC.  8)

The switch is there only to step the simulation between the circuit with diode, and without (shorted diode).  When simulated, without vs with diode, the distortions went from 7% to 0.4%.
« Last Edit: May 29, 2024, 09:25:38 am by RoGeorge »
 

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Re: Say a weekend project idea, something nice to build
« Reply #60 on: May 29, 2024, 09:27:19 am »
D1 should probably be another BC547C and the whole thing seems equivalent to a differential pair - emitters connected together, D1 base AC grounded.
 


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