| General > General Technical Chat |
| Semiconductor theory |
| (1/1) |
| DMartens:
In textbooks, an intrinsic (=pure) semiconductor crystal is always drawn as a two-dimensional grid of neatly arranged atoms (usually Si or Ge) with 4 valence electrons each, forming covalent bonds with 1 electron each of its 4 neighbouring atoms, giving 8 valence electrons in the outer shell. But in practice, the crystals are three-dimensional, so each atom has 6 neighbours instead of 4. So why do we always draw them as 2-D structures? Why can we make this simplification? What would change if we did not do this simplification? How would that impact the analysis of the semiconductor devices? What would change in the formulas we derive? |
| Nominal Animal:
The 3D bulk structure of silicon and germanium is face-centered diamond cubic, not basic cubic. The 2D regular square lattice is not a representation of the actual atoms' positions, only of their rough interactions: in the 3D face-centered diamond cubic lattice, each atom in the bulk has 4 nearest neighbors (and not 6, as you assumed). |
| MarkT:
--- Quote from: DMartens on December 09, 2023, 06:44:47 am ---But in practice, the crystals are three-dimensional, so each atom has 6 neighbours instead of 4. --- End quote --- Si and Ge are a covalently bonded diamond lattice, unsurprizing given they are in the same column of the periodic table as carbon. Diamond is also a semicoductor, though you have to heat it up a bit to get mobile charge carriers as the bandgap is huge. MIT have a great EDx course: https://mitxonline.mit.edu/courses/course-v1:MITxT+3.15x/ |
| mawyatt:
An interesting use of Si with added Ge was to enhance the base emitter properties of bipolar transistors with IBM way back in late 80s. However, another use was for straining the Si lattice to create faster MOS devices. The Si lattice was strained by the selective implant of Ge to produce a MOS transistor where the Carriers Mobility was improved, thus improving speed. This became a very popular CMOS fabrication method to create a faster MOS devices. Best, |
| Navigation |
| Message Index |