Using ESD diodes to check pin connections

[NiHaoMike]

Those who have worked with BGA test sockets know that especially after a few dozen cycles, they tend to make bad contact. One of my coworkers, often having to deal with that problem, has a trick to quickly check the connection of I/O pins. With the board powered off, he would take a common DMM, set it to diode mode, clip the red lead to a ground point, and use the black lead to probe the I/Os with nothing else connected. He says that the voltage and current outputted by a DMM in diode mode is too low to damage even sensitive chips.

Is that still true for the latest 14nm and smaller ASICs? Are there any common semiconductors that are likely to be damaged by trying to check them with a DMM?

[T3sl4co1l]

Fine pitch fab, and low voltages, don't do much for the pins: they still have to deal with the physical reality of huge (relative) chunks of metal being charged to comparable voltages and transmitting electromagnetic waves.  A typical SSTL signal might have to deliver 10mA per pin, so the transistors are at least that big.  Not necessarily as robust in reverse, especially if reverse bias causes charge injection and further problems (CMOS latchup?), but surely on the same order.

I recall Altera typically warns to avoid peak currents over 10mA or so, and DC over 2mA, in or out of FPGA pins.  They're surely small, but they still have to deal with the fact that they are pins.  I'll admit FPGAs are probably on the more robust side of nano scale fabs, being that the IO banks often have to operate up to 3.3V, with a variety of configurations (anything from LVTTL to LVDS..), whereas CPU pins might only operate at 1.2 or 1.5V with an SSTL type design.

Tim

[amyk]

Be careful of what voltage the DMM can supply, as it could be more than enough to damage the gates and avalanche the junctions if reverse-biased.

[Someone]

Be careful of what voltage the DMM can supply, as it could be more than enough to damage the gates and avalanche the junctions if reverse-biased.

Yes, the DMM will have a larger open circuit voltage across it just as the pin is touched. Its not at all the same as sweeping it with a curve tracer from zero volts with a voltage and current limit (which is easy and safe if you have the hardware)

[free_electron]

yep works fine.
that is how mass production testers at the semiconductor manifactere do it as well. hook up to the devices power rail and check for presence of the esd diodes. that veriefes the socket has good connection to all pins before they power up the device and start testing.