Author Topic: What if your mentor does not know the answer to your question?  (Read 2356 times)

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Offline dastructhmTopic starter

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What if your mentor does not know the answer to your question?
« on: September 19, 2022, 04:38:35 am »
Like I recently managed to draw a schematic of my desired circuit for FT232RL. I followed other vendor's schematic and studied their hardware and then presented my schematic to my mentor. He was like, I never used FT232RL before and your schematic looks ok to me.

only "looks ok.”  :'(

I wonder how I can be sure my schematic is 100% correct, without using Multisim or the like.

 
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Offline ataradov

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Re: What if your mentor does not know the answer to your question?
« Reply #1 on: September 19, 2022, 04:59:25 am »
"It looks ok" is a good answer for a simple schematic. There is nothing that stands out as outright wrong and if you followed manufacturer's recommendations, you are likely fine.

The way you know it works is by assembling it and testing. There is no need to overthink this. If you run into some issue, you will debug it and next time will know. That's how you learn.
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Offline WattsThat

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Re: What if your mentor does not know the answer to your question?
« Reply #2 on: September 19, 2022, 05:20:30 am »
You left reset floating which is active low input.  Best to tie it to +5 volts to avoid flakey operation.

While it will not affect operation, the 10uf bypass seems to be overkill for the unused 3V3 output. That cap would be better used on the +5 line where higher currents are being used.
 
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Offline ataradov

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Re: What if your mentor does not know the answer to your question?
« Reply #3 on: September 19, 2022, 05:22:24 am »
Reset has internal pull-up, the datasheet is explicit on that - "If not required can be left unconnected".
Alex
 
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Offline tooki

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Re: What if your mentor does not know the answer to your question?
« Reply #4 on: September 20, 2022, 06:35:10 pm »
Like I recently managed to draw a schematic of my desired circuit for FT232RL. I followed other vendor's schematic and studied their hardware and then presented my schematic to my mentor. He was like, I never used FT232RL before and your schematic looks ok to me.

only "looks ok.”  :'(

I wonder how I can be sure my schematic is 100% correct, without using Multisim or the like.
Honest question: what kind of answer were you expecting? I mean, nobody can have experience with every part in existence. And if he’d found an obvious problem, he would have mentioned it.

FWIW, the challenge will be more when you get to the PCB layout. USB is picky, so you have to lay it out properly. (That looks like Altium, right? You can tell it to make your USB data lines a differential pair, then assign it a controlled impedance of 90 ohms. Then Altium will ensure the traces are compliant.)

Also, I’d add ESD protection to the USB data and power lines, e.g. with a Bourns CD143A-SR05 or equivalent.
« Last Edit: September 20, 2022, 06:40:14 pm by tooki »
 
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Offline armandine2

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Re: What if your mentor does not know the answer to your question?
« Reply #5 on: September 20, 2022, 06:39:40 pm »
If you want to do a course which allows access to multisim - open university t212
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Offline temperance

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Re: What if your mentor does not know the answer to your question?
« Reply #6 on: September 20, 2022, 07:00:55 pm »
Today many people seem to think labeled net's are the proper way to draw schematics. Your mentor could have give you some advise on drawing proper schematics.

-Change the pin layout in the schematic symbol such that you don't have to many lines crossing each other and group signals which belong together.
-Leave enough room around pin's in the schematic symbol for extra components. (Decoupling caps including GND / VCC netlabels, ferrite beads, terrmination resistors, TVS diodes or any other component required for the functionality of the chip ion question)
-Use net labels only if required to connect different functional blocks together for example.

If I'm not mistaken, Dave has done a video detailing how to do proper schematics.



 
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Offline Benta

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Re: What if your mentor does not know the answer to your question?
« Reply #7 on: September 20, 2022, 07:17:49 pm »
Today many people seem to think labeled net's are the proper way to draw schematics. Your mentor could have give you some advise on drawing proper schematics.
-Change the pin layout in the schematic symbol such that you don't have to many lines crossing each other and group signals which belong together.
I have to agree. Ugly and hard to understand schematic.
Why don't you use the official symbol from the data sheet? Signals belonging together are grouped together, which is as it should be:
 
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Offline pcprogrammer

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Re: What if your mentor does not know the answer to your question?
« Reply #8 on: September 21, 2022, 04:48:27 am »
Today many people seem to think labeled net's are the proper way to draw schematics. Your mentor could have give you some advise on drawing proper schematics.

For very big parts like FPGA's or ADC's with lots of pins it is very difficult to not do it without labeled nets. Even when connections are made with buses it is still needed to label the unique signals. And only for printed to paper it makes a difference in reading the schematic. On the computer it is easy to use the tools like find to find the connected pins.

With these big parts it is often needed to use multiple sheets and then the only way to connect is via labeled nets.

In the end nowadays the schematic is mainly part of the toolchain for the engineer to get to the PCB. And here the computer makes net lists to check if both schematic and PCB are the same. No manual checking needed.

But I agree that for simple schematics using wires to make the connections makes it easier to read.

Offline tooki

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Re: What if your mentor does not know the answer to your question?
« Reply #9 on: September 21, 2022, 09:09:50 am »
One factor regarding labeled nets instead of drawing lines might be the software itself: while some programs, like Altium, handle drawn lines well, others, like KiCad, are terrible at it. (Moving a component in KiCad turns your lines into a rats nest of diagonal lines.) So it’s no wonder people will lean towards using net labels instead.
 
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Online tggzzz

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Re: What if your mentor does not know the answer to your question?
« Reply #10 on: September 21, 2022, 10:50:02 am »
Today many people seem to think labeled net's are the proper way to draw schematics. Your mentor could have give you some advise on drawing proper schematics.

For very big parts like FPGA's or ADC's with lots of pins it is very difficult to not do it without labeled nets. Even when connections are made with buses it is still needed to label the unique signals. And only for printed to paper it makes a difference in reading the schematic. On the computer it is easy to use the tools like find to find the connected pins.

With these big parts it is often needed to use multiple sheets and then the only way to connect is via labeled nets.

In the end nowadays the schematic is mainly part of the toolchain for the engineer to get to the PCB. And here the computer makes net lists to check if both schematic and PCB are the same. No manual checking needed.

But I agree that for simple schematics using wires to make the connections makes it easier to read.

Not true: there is a halfway house that has been in use since the 1970, i.e. before CAD was common. The halfway house is to use a bus, which combines the best of both techniques. Put simply, many "wires" are collected together and individual wires labelled where they enter/exit. That's a no-brainer for data and address busses, but also works well for control busses and (less usefully) for power supplies.

With software designs, "coupling" and "cohesion" are considered to be key metrics of quality. They are just as important in hardware designs.

Wires and busses directly show cohesion and coupling. Labelled nets explicitly hide cohesion and coupling.
There are lies, damned lies, statistics - and ADC/DAC specs.
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Offline pcprogrammer

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Re: What if your mentor does not know the answer to your question?
« Reply #11 on: September 21, 2022, 11:26:15 am »
Wires and busses directly show cohesion and coupling. Labelled nets explicitly hide cohesion and coupling.

Yes that is true, but then there is still the need to lookup a specific signal on both ends of the bus, and when the bus spreads multiple components or sheets it is still the trick to find the signal on the other end.

But another matter in schematics drawings nowadays, also used by me because I got somewhat lazy, is black box symbols for basic logic components or even opamps. You know, just a simple square, the part number and the connections, without a clue as to what is inside the black box. Sometimes even a whole 7400 ic instead of the single 2 input and gates. :palm:

Online tggzzz

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Re: What if your mentor does not know the answer to your question?
« Reply #12 on: September 21, 2022, 12:30:39 pm »
Wires and busses directly show cohesion and coupling. Labelled nets explicitly hide cohesion and coupling.

Yes that is true, but then there is still the need to lookup a specific signal on both ends of the bus, and when the bus spreads multiple components or sheets it is still the trick to find the signal on the other end.

But another matter in schematics drawings nowadays, also used by me because I got somewhat lazy, is black box symbols for basic logic components or even opamps. You know, just a simple square, the part number and the connections, without a clue as to what is inside the black box. Sometimes even a whole 7400 ic instead of the single 2 input and gates. :palm:

Or signals going right to left. Feedback signals ought to be shown right to left, of course  :)

Or ignoring traditional schematic layouts, designed to give a Big Hint about what that part of the circuit is doing.

Or cramming everything onto one sheet, distorting the schematic layout. (Win Hill and Bob Pease are offenders there :( )
There are lies, damned lies, statistics - and ADC/DAC specs.
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Offline temperance

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Re: What if your mentor does not know the answer to your question?
« Reply #13 on: September 21, 2022, 12:48:14 pm »
pcprogrammer,

did I say net labels should be banned from your vocabulary to develop readable schematics? The other extreme is not using net labels and buses at all which is equally bad. Examples of both can be found everywhere while rules to create readable schematics aren't that difficult to apply with reason.
 

Offline pcprogrammer

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Offline pcprogrammer

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Re: What if your mentor does not know the answer to your question?
« Reply #15 on: September 21, 2022, 12:51:42 pm »
pcprogrammer,

did I say net labels should be banned from your vocabulary to develop readable schematics? The other extreme is not using net labels and buses at all which is equally bad. Examples of both can be found everywhere while rules to create readable schematics aren't that difficult to apply with reason.

No you did not. And it indeed lies in "apply with reason" to make something proper.

Offline hans

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Re: What if your mentor does not know the answer to your question?
« Reply #16 on: September 21, 2022, 01:00:53 pm »
FWIW, the challenge will be more when you get to the PCB layout. USB is picky, so you have to lay it out properly. (That looks like Altium, right? You can tell it to make your USB data lines a differential pair, then assign it a controlled impedance of 90 ohms. Then Altium will ensure the traces are compliant.)

Also, I’d add ESD protection to the USB data and power lines, e.g. with a Bourns CD143A-SR05 or equivalent.

The FT232RL is a USB 2.0 12Mbit/s part (Full Speed, FS) The 2.0 is a protocol spec, with the 12Mbit/s is the second slowest speed. You can literally run that USB speed class over a couple of cm of wire and it will work. Don't do that with 480Mbit/s (High Speed, HS) or higher specifications, as those are far more sensitive.
I actually selected a Full Speed USB hub on purpose, as a next-gen module card I used got an upgrade to USB 480Mbit/s, but we didn't want to bother with touchy USB lines, unshielded internal cables, bad customer cables, etc.

ESD protection is always useful, when it's properly located near the USB connector.

Regarding mentoring: this is a big difference between doing something in a class. At some point you're going to be the expert , and no one knows the exact answer for your questions. You can have discussions as to what the answer might be, and other people will always have key pieces of information, insights or experience that can help you. But they don't have the time to do the work for you.

I have never reviewed a schematic in such detail where I'd check PCB footprints, pin numbers of IC symbols etc. That's your responsibility as it's a relatively easy fix. I think it's good if a design review focus' on higher details.

Like if I don't know this chip.. I'd say:

- Does this chip need a crystal? I see OSCI and OSCO pins but they are not connected!
- Do USB pins need some pull-up, resistors, EMC filters?
- Do the USB pins have enough ESD protection?
- Do we want to add some "DNP" (Do Not Place) resistors on the RESET# line in case we must do something with it?
- Are all chip rails able to run of "Vcc" (whatever rail level that is)? Where does Vcc come from? (e.g. does it make sense in the power topology)
- Do RXD/TXD need series resistors to slow the edges down a bit (EMC, reflections)? Also nice backup if you ever accidently swap TX/RX (classic mishap).
- What is the forward voltage drop of the blue LED diode?

And concerning drawing style.. it depends a lot on company and opinion. But I'd:

- Sort pin functions group functions instead of on pin number. (so put the UART pins together, CBUS together in-order, USB inputs with reset, and power rails top, GND bottom side of symbol)
- Net labels are nice for layout to see what signal you're routing. However use them as invisible jumper wires with caution. If you can organize these "function groups" logically, it also allows you to draw smaller schematics with relevant parts aligned nicely without "invisible" jumper wires. In this schematic it can be very hard to follow where D- and D+ go to..
- Nit picky things: you have explicitly drawn C21 to go near pin 4, C20 near pin 20, etc. Does this also map with layout? Or does it even matter? Generally -in the schematic!!- I don't position the decoupling caps right at the VCC pins: these are not the passives that I want to draw attention to. E.g. a bias resistor, crystal or other passive networks are far more important. Obviously a group of decoupling caps (that I still place close to the chip they belong to) should be placed near the VCC/GND pins, with smallest cap value closer, but which 100nF cap is at which pin doesn't really matter if they are in the same net.
- The right hand side contains 6 GND symbols. The wire to GND on pin 21 is very long. This is not necessary if you can group pin functions and just draw a small wire.
- It seems multiple grids or a fine grid was used to connect some parts (specifically C21/C22). I try to draw everything in "grid 10" on schematics. This is the grid which pins are drawn onto, so it's nice and simple. Only for nice art on component symbols I would drop the grid lower.

Anyway, those were my 2 cents.

edit: side note on the morale of needing to reply, or do this and that  :blah: ..
Let's just say a good mentor above all should be constructive and not destructive. If someone is out to give you the feeling you're stupid for asking something, then that's a shortcoming of that person. This is true for driving lessons, career advice, technical advice, etc.etc. Some people get cynical about "I was never that green when I started". Who cares. Being "gifted" has equal worth to working hard and willing to learn.
« Last Edit: September 22, 2022, 12:17:44 pm by hans »
 
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Offline Benta

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Re: What if your mentor does not know the answer to your question?
« Reply #17 on: September 21, 2022, 05:12:53 pm »
@tggzzz, I agree 100% with your views on this issue.
For some (inexperienced?) designers, the significance of schematics seem lost.

Schematics should explain the function of a circuit to others, oneself, and oneself after 5 years in the clearest way possible.
It's artwork, just as a PCB layout is artwork.

Unfortunately, not many designers seem to agree.
Schematics are apparently just a tedious job to do as quickly as possible to be able to generate a netlist to make a PCB.
Making "black boxes" doesn't even make sense. Modifying an existing symbol is much faster and easier.

I hope it's just not ignorance.
 
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Offline tooki

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Re: What if your mentor does not know the answer to your question?
« Reply #18 on: September 21, 2022, 05:18:18 pm »
FWIW, the challenge will be more when you get to the PCB layout. USB is picky, so you have to lay it out properly. (That looks like Altium, right? You can tell it to make your USB data lines a differential pair, then assign it a controlled impedance of 90 ohms. Then Altium will ensure the traces are compliant.)

Also, I’d add ESD protection to the USB data and power lines, e.g. with a Bourns CD143A-SR05 or equivalent.

The FT232RL is a USB 2.0 12Mbit/s part (Full Speed, FS) The 2.0 is a protocol spec, with the 12Mbit/s is the second slowest speed. You can literally run that USB speed class over a couple of cm of wire and it will work. Don't do that with 480Mbit/s (High Speed, HS) or higher specifications, as those are far more sensitive.
I actually selected a Full Speed USB hub on purpose, as a next-gen module card I used got an upgrade to USB 480Mbit/s, but we didn't want to bother with touchy USB lines, unshielded internal cables, bad customer cables, etc.
I’ve seen a competing USB 2.0 Full Speed UART converter (the CP2102N) completely fail due to (really) bad USB layout. So while it’s certainly nowhere near as picky as 480Mbps and above, it’s still sensitive enough to not tolerate really bad layout. Easiest way to ensure that is to do what I said: tell the EDA software what it is so it can enforce it. (My own layout of the same circuit worked.)
 
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Offline SiliconWizard

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Re: What if your mentor does not know the answer to your question?
« Reply #19 on: September 21, 2022, 06:01:02 pm »
As a side note (sorry if I missed it in the thread), the "ugly" part may lie in the part of the schematic you're not showing here.
 

Offline dastructhmTopic starter

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Re: What if your mentor does not know the answer to your question?
« Reply #20 on: September 22, 2022, 10:36:46 am »
I'll be stabbed if I continue to read without replying.  :popcorn:
Thank you for the tips.
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