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What if your mentor does not know the answer to your question?

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pcprogrammer:

--- Quote from: temperance on September 21, 2022, 12:48:14 pm ---pcprogrammer,

did I say net labels should be banned from your vocabulary to develop readable schematics? The other extreme is not using net labels and buses at all which is equally bad. Examples of both can be found everywhere while rules to create readable schematics aren't that difficult to apply with reason.

--- End quote ---

No you did not. And it indeed lies in "apply with reason" to make something proper.

hans:

--- Quote from: tooki on September 20, 2022, 06:35:10 pm ---FWIW, the challenge will be more when you get to the PCB layout. USB is picky, so you have to lay it out properly. (That looks like Altium, right? You can tell it to make your USB data lines a differential pair, then assign it a controlled impedance of 90 ohms. Then Altium will ensure the traces are compliant.)

Also, I’d add ESD protection to the USB data and power lines, e.g. with a Bourns CD143A-SR05 or equivalent.

--- End quote ---

The FT232RL is a USB 2.0 12Mbit/s part (Full Speed, FS) The 2.0 is a protocol spec, with the 12Mbit/s is the second slowest speed. You can literally run that USB speed class over a couple of cm of wire and it will work. Don't do that with 480Mbit/s (High Speed, HS) or higher specifications, as those are far more sensitive.
I actually selected a Full Speed USB hub on purpose, as a next-gen module card I used got an upgrade to USB 480Mbit/s, but we didn't want to bother with touchy USB lines, unshielded internal cables, bad customer cables, etc.

ESD protection is always useful, when it's properly located near the USB connector.

Regarding mentoring: this is a big difference between doing something in a class. At some point you're going to be the expert , and no one knows the exact answer for your questions. You can have discussions as to what the answer might be, and other people will always have key pieces of information, insights or experience that can help you. But they don't have the time to do the work for you.

I have never reviewed a schematic in such detail where I'd check PCB footprints, pin numbers of IC symbols etc. That's your responsibility as it's a relatively easy fix. I think it's good if a design review focus' on higher details.

Like if I don't know this chip.. I'd say:

- Does this chip need a crystal? I see OSCI and OSCO pins but they are not connected!
- Do USB pins need some pull-up, resistors, EMC filters?
- Do the USB pins have enough ESD protection?
- Do we want to add some "DNP" (Do Not Place) resistors on the RESET# line in case we must do something with it?
- Are all chip rails able to run of "Vcc" (whatever rail level that is)? Where does Vcc come from? (e.g. does it make sense in the power topology)
- Do RXD/TXD need series resistors to slow the edges down a bit (EMC, reflections)? Also nice backup if you ever accidently swap TX/RX (classic mishap).
- What is the forward voltage drop of the blue LED diode?

And concerning drawing style.. it depends a lot on company and opinion. But I'd:

- Sort pin functions group functions instead of on pin number. (so put the UART pins together, CBUS together in-order, USB inputs with reset, and power rails top, GND bottom side of symbol)
- Net labels are nice for layout to see what signal you're routing. However use them as invisible jumper wires with caution. If you can organize these "function groups" logically, it also allows you to draw smaller schematics with relevant parts aligned nicely without "invisible" jumper wires. In this schematic it can be very hard to follow where D- and D+ go to..
- Nit picky things: you have explicitly drawn C21 to go near pin 4, C20 near pin 20, etc. Does this also map with layout? Or does it even matter? Generally -in the schematic!!- I don't position the decoupling caps right at the VCC pins: these are not the passives that I want to draw attention to. E.g. a bias resistor, crystal or other passive networks are far more important. Obviously a group of decoupling caps (that I still place close to the chip they belong to) should be placed near the VCC/GND pins, with smallest cap value closer, but which 100nF cap is at which pin doesn't really matter if they are in the same net.
- The right hand side contains 6 GND symbols. The wire to GND on pin 21 is very long. This is not necessary if you can group pin functions and just draw a small wire.
- It seems multiple grids or a fine grid was used to connect some parts (specifically C21/C22). I try to draw everything in "grid 10" on schematics. This is the grid which pins are drawn onto, so it's nice and simple. Only for nice art on component symbols I would drop the grid lower.

Anyway, those were my 2 cents.

edit: side note on the morale of needing to reply, or do this and that  :blah: ..
Let's just say a good mentor above all should be constructive and not destructive. If someone is out to give you the feeling you're stupid for asking something, then that's a shortcoming of that person. This is true for driving lessons, career advice, technical advice, etc.etc. Some people get cynical about "I was never that green when I started". Who cares. Being "gifted" has equal worth to working hard and willing to learn.

Benta:
@tggzzz, I agree 100% with your views on this issue.
For some (inexperienced?) designers, the significance of schematics seem lost.

Schematics should explain the function of a circuit to others, oneself, and oneself after 5 years in the clearest way possible.
It's artwork, just as a PCB layout is artwork.

Unfortunately, not many designers seem to agree.
Schematics are apparently just a tedious job to do as quickly as possible to be able to generate a netlist to make a PCB.
Making "black boxes" doesn't even make sense. Modifying an existing symbol is much faster and easier.

I hope it's just not ignorance.

tooki:

--- Quote from: hans on September 21, 2022, 01:00:53 pm ---
--- Quote from: tooki on September 20, 2022, 06:35:10 pm ---FWIW, the challenge will be more when you get to the PCB layout. USB is picky, so you have to lay it out properly. (That looks like Altium, right? You can tell it to make your USB data lines a differential pair, then assign it a controlled impedance of 90 ohms. Then Altium will ensure the traces are compliant.)

Also, I’d add ESD protection to the USB data and power lines, e.g. with a Bourns CD143A-SR05 or equivalent.

--- End quote ---

The FT232RL is a USB 2.0 12Mbit/s part (Full Speed, FS) The 2.0 is a protocol spec, with the 12Mbit/s is the second slowest speed. You can literally run that USB speed class over a couple of cm of wire and it will work. Don't do that with 480Mbit/s (High Speed, HS) or higher specifications, as those are far more sensitive.
I actually selected a Full Speed USB hub on purpose, as a next-gen module card I used got an upgrade to USB 480Mbit/s, but we didn't want to bother with touchy USB lines, unshielded internal cables, bad customer cables, etc.

--- End quote ---
I’ve seen a competing USB 2.0 Full Speed UART converter (the CP2102N) completely fail due to (really) bad USB layout. So while it’s certainly nowhere near as picky as 480Mbps and above, it’s still sensitive enough to not tolerate really bad layout. Easiest way to ensure that is to do what I said: tell the EDA software what it is so it can enforce it. (My own layout of the same circuit worked.)

SiliconWizard:
As a side note (sorry if I missed it in the thread), the "ugly" part may lie in the part of the schematic you're not showing here.

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