Why do 74-series counters label their enable pins T and P?

[JetForMe]

I posed this question to StackExchange, but figured I'd ask here, too. There are a couple of answers, but they’re not quite complete, I think:

A few 74-series counter ICs I’ve looked at have two enable pins, and they’re labeled “T” and “P” (for example, the [color=var(--theme-link-color-visited)]74LS161A[/iurl], or [color=var(--theme-link-color-visited)]74ALS867A[/color]). The “T” input affects the ripple carry out, and the data sheets say this pins are used to enable cascading ICs, but they’re not precise about how to connect them.[/font][/size][/color]

After some experimentation, I tied the ENT pins together to use as a global enable, and tied the RCO of the lower stage to the ENP input of the upper stage:



This behaves as expected, but what do “T” and “P” stand for?

[Benta]

Wow, totally obsolete parts. Nostalgia.
But anyway: ENP/CEP or ENT/CET: no one knows how names come into being. I agree they are not logical.
Functionally, they do make a difference in longer (12+ bits), high-speed counters.

[Andy Watson]

Can't you acccept that they just ARE - it's the way of the world, etc..

Ok, this is really a guess, but:
ENP enables the clock Pulse to the chain of flip-flops. ENT enables the ripple carry forward (RCO) - so it enables the next cahin of  flip-flops to Toggle.

[Swainster]

ENable Parallel and ENable Trickle (but they are interchangeable). As Andy Watson says, its for chaining/cascading of multiple counters, although in this case they are synchronous rather than ripple counters. One enable goes to the previous counter, the other is for parallel load.

[pgo]

enable_p and enable_t are NOT interchangeable.

As pointed out above they are for parallel and trickle enables.
All the parallel enables are usually connected together to enable/disable all the counters.
The enable_T is used to form a combined parallel/serial* carry chain to enable the counters to be cascaded (as shown in the circuit given earlier).
Note the different wiring to the ripple out in the circuit below.

* Within the counter IC the carry is parallel with ripple between each stage.

[Swainster]

Actually, come to think of it, that makes a lot more sense, otherwise they wouldn't have given them different letter suffixes. I stand corrected!