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Why not CMOS?

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coppice:

--- Quote from: Ian.M on February 01, 2022, 04:31:29 pm ---FRAM has its own issues - reads are destructive i.e. during or after every read cycle the on-chip controller *MUST* re-write the location to preserve the contents.   If power glitches during a read cycle or drops out of spec, you can expect data corruption.   e.g. https://www.eevblog.com/forum/projects/the-other-downside-to-fram/

--- End quote ---
Every FRAM device I know of has elaborate "anti-tearing" hardware inside, to ensure no read or write cycle ever starts unless there is enough energy on chip to complete it. This is designed and tested to deal with extreme EMI induced noise, as well as the power simply turning off. So, if you ever get corruption of an FRAM's contents, which you are certain was not due to the rest of your system doing dodgy writes when the power isn't clean, complain to the vendor.

David Hess:

--- Quote from: james_s on February 03, 2022, 09:46:27 pm ---
--- Quote from: David Hess on February 01, 2022, 09:50:51 pm ---And FRAM requires a precharge cycle on every read so it is not always a direct replacement for JEDEC SRAM.
--- End quote ---

That's the issue I ran into. On a hardware level it is a direct replacement, but the software must be designed to meet the specific needs of FRAM.
--- End quote ---

I would not call it a software issue.  In practice it means that at the hardware level, -CS (chip select) must be toggled between every read access which is what activates precharge on a FRAM.  On a SRAM there is no such requirement and in some systems, continuous reads are done without togging chip select so those will not work with FRAM.

Benta:

--- Quote from: David Hess on February 01, 2022, 09:49:49 pm ---Before Flash memory existed we had SONOS which is what I used to replace the Dallas NVSRAMs in my Tektronix 2440 DSO.  It consists of a SRAM array in parallel with an EEPROM array and when power is lost, the entire SRAM array is copied into the EEPROM array in one step.

https://www.infineon.com/cms/en/product/memories/nvsram-non-volatile-sram/

--- End quote ---

SONOS blahblah. Infineon marketing.
The nvSRAM was made by ZMD (later ZMDI, acquired by Infineon at some point). Brilliant parts. IIRC, a US company was following the same idea, but I don't recall the name.
That Infineon presents itself as the great inventor here is laughable.

srb1954:

--- Quote from: Benta on February 03, 2022, 10:28:28 pm ---SONOS blahblah. Infineon marketing.
The nvSRAM was made by ZMD (later ZMDI, acquired by Infineon at some point). Brilliant parts. IIRC, a US company was following the same idea, but I don't recall the name.
That Infineon presents itself as the great inventor here is laughable.

--- End quote ---
Xicor had a chip, the XC22C12, that did this function nearly 30 years ago. It was quite small at only 1kbits but would still have been useful in many small systems.

Berni:
We have FRAM chips that work like SRAM these days, like the Cypress CY15B102N:
https://www.infineon.com/dgdl/Infineon-CY15B102N_2-Mbit_(128K_X_16)_Automotive_F-RAM_Memory-DataSheet-v05_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ecf917749ed

Page 8 of the datasheet clearly mentions it as being a SRAM drop in replacement by using what they call "Page read" mode with no limitation of actually staying within a page or column, but you can increase the speed if you access it in the way the FRAM finds it convenient.

Not like parallel bus FRAM is all that relevant these days. Modern designs use MCUs that have everything they need inside so running a async memory bus on a PCB has fallen out of fashion due to the huge number of pins and board space it requires. So if you are going to use FRAM these days it will likely be SPI or QSPI interface. It still runs plenty fast (you can get 500Mbit/s from 133MHz QSPI) while they act pretty much like SPI SRAM where you can just start writing/reading at any location and keep going until the end of the memory area.

This detail is only really a factor in retrofitting battery backed SRAM with FRAM. I did replace all the battery backed SRAM chips with FRAM in a HP 3458A and it ran great, but in some of the other gear just sticking in FRAM indeed does not work due to how the CS is used and how fast the memory is running.

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