Lastly, do the people who do the design, using software, do they have to learn semiconductor physics? Or are they mostly ignorant of it, since all they probably need to know is how to use the design software and follow the rules?
So then, who should learn semiconductor physics? The guys working in the foundries? And who are the guys who design the equipment that builds the chips in the foundries?
Yes, if you want to be an (analog) IC
design engineer you do have to learn that stuff. If you're doing analog IC design on a masters university level, pay some notable attention to electric fields & magnetics courses. I finished an analog design masters course last semester, and needless to say without that course it was a struggle, knowing also that the lecturer will fail anyone on the oral exam who can't explain fundamentals (like drift vs diffusion current), even if you're a legend on the rest.
It's not like you're constantly working on the physics level on each design step, but for example in CMOS design it's important to understand what parameters are tweak-able (like width/length of CMOS devices) and what implications those adjustments will have. Also there are a lot of 2nd order and even higher order effects in CMOS design, so understanding of those is essential. This is necessary to get any chance of a working design, let alone good.
In general I think (analog) IC design can sit between borderline physics level up (model of 1 transistor) to systems design level (like some kind of SoC).
There are also groups that focus more on the physics level and actually don't care much at all how systems are designed with them. They just want to build better transistors: more bandwidth, better matching, lower leakage currents, etc.
I would also like to add that I've seen a lot of fellow students and PhDs from mixing majors. Some (applied) physics students doing analog IC design course, where maybe an EE takes extra courses in device physics.
I didn't mention digital IC design much at all: it's mostly synthesized by computer from HDL languages to pretty standard "logic cells" at an ASIC level. Yet some device physics can still be useful, given that clock distribution in high-speed (GHz) digital IC's is not that easy, especially at low-power.
I am not sure what education requirements are needed for the people working in the "factory". But my intuition tells me that it's not going to be master university level at all.
ASML is the current leader of chip lithography machines. I think TSMC, etc. all buy their machines. I've been told the competition is not really up there, but kept alive artificially to have a '2nd source'.