EEVblog Electronics Community Forum
Electronics => PCB/EDA/CAD => Circuit Studio => Topic started by: mrtn on December 13, 2016, 07:28:45 pm
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I just received the first board I designed using Circuit Studio. It's a high power PFC booster. The board is very simple which is why I thought it would be a good way to get started.
The notable strong points of Circuit Studio for this board are that:
1. The interactive router (all manual here) works really well.
2. Making components in Circuit Studio (or Altium Designer) is super simple. You could chalk it up to experience but I haven't made a single incorrect footprint since I started using Altium a few years ago.
3. I like how you can use fills and solid regions to add copper to nets that already exist. This saves a lot of time vs. specifically defining polygons.
(see attached images)
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Nice board. I don't have much experience in making board in Circuit Studio. What is the purpose oof this board?
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Nice board. I don't have much experience in making board in Circuit Studio. What is the purpose oof this board?
It's a PFC preregulator to boost AC line voltage to high voltage DC while creating a unity power factor.
The chip is a FAN9673 which you can read about here:
https://www.fairchildsemi.com/products/power-management/power-factor-correction/interleaved-pfc-controllers/FAN9673.html (https://www.fairchildsemi.com/products/power-management/power-factor-correction/interleaved-pfc-controllers/FAN9673.html)
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Very nicely done. How easy was it to drop those stitching vias? Find that it's a tad difficult in PADs
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Very nicely done. How easy was it to drop those stitching vias? Find that it's a tad difficult in PADs
Driven from a rule in altium. Simply draw the bounding box and altium will fill it according to your rules. You alter the bounding box at will and it will recreate them.
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On next bath rotate C4 90 degree, processor tracks will short a lot, same for C1 and C8
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On next bath rotate C4 90 degree, processor tracks will short a lot, same for C1 and C8
And now you have a nice big hole smack in the middle of your high current trace.
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You mean high current Path short, and with low resitance path
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Very nicely done. How easy was it to drop those stitching vias? Find that it's a tad difficult in PADs
Driven from a rule in altium. Simply draw the bounding box and altium will fill it according to your rules. You alter the bounding box at will and it will recreate them.
Interesting. I'm guessing this is another thing that they've masked off in CS. However, could you share what the rule is? So I can try it in CS and see if it works. Best yet share a rule export of it.
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On next bath rotate C4 90 degree, processor tracks will short a lot, same for C1 and C8
And now you have a nice big hole smack in the middle of your high current trace.
C1/4/8 are film caps (see image)
The large round caps are rotated the way they are so I can run the bottom side buses vertically. Yes might be better the other way.. good news is that it appears to work the way it is so far. The thin current sense tracks are differential and it doesn't make a big difference if they're an extra 25mm long.
Sorry the via stitching was just manual. I set the grid size to the via distance and just drop a bunch of vias where I want them.
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On next bath rotate C4 90 degree, processor tracks will short a lot, same for C1 and C8
And now you have a nice big hole smack in the middle of your high current trace.
C1/4/8 are film caps (see image)
Oh, yes, we both misread that silk.
It's fine the way it is.