Author Topic: Rule difficulties in Circuitstudio  (Read 741 times)

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Offline mf_ibfeew

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Rule difficulties in Circuitstudio
« on: February 25, 2021, 07:34:44 pm »
Hello,
I work since 4 weeks with Circuitstudio and I have some difficulties with the Design rules in Circuitstudio.

1) clearance between copper and pcb-edges:
Until now I have not found a rule to define a clearance between copper traces (and copper-polygon-fills) and board-outline layer.
As a workaround I copy the board shape additionally to the keepout-layer and define a clearance-rule copper<->keepout.
Kind of works, but I must not forget this step and its also additionally work.
Have I to live with the workaround or is there another/better rule/approach?

2) clearance copper - drilled holes
This is an advanced problem of nr.1 All traces need a minimum clearance to all drilled (unplated) holes and milled slots (depends on pcb-manufacturer, my minimum is 0.3mm). The keepout-layer from problem 1 (generated with "create primitives from board shape") doesn't include the holes/milling slots, so the defined clearance-rule (from problem 1) can't see the holes and doesn't see a violation if the traces are running straight without space along the holes. Can I define a rule, which detects this sort of failure?
As a workaround I will use holes and manual add concentrical keepout-circle. But this is error-prone, if I change the hole (either diameter an/or position) I will have to make identical changes to the keepout-circle.

3) minimum trace width
The appended picture shows a problem with a minimum copper width. The net connects to the pad only with a very small edge, but none of the design-rules catches this event. Neither  the "unrouted" nor the "minimum trackwidth" - rules are complaining at this picture. Is there a rule which marks this picture as failure?

Thanks in advance, Maik Freitag
 

Offline Joel_l

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Re: Rule difficulties in Circuitstudio
« Reply #1 on: February 26, 2021, 02:07:02 am »
Hi,

From the home tab you can select design rules. That pops up a window where you can select from many of the design rules you can implement.

On the left you can select electrical->clearance and there is a table where you can set the clearance rule for object to object.

 

Offline mf_ibfeew

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Re: Rule difficulties in Circuitstudio
« Reply #2 on: February 26, 2021, 05:45:50 pm »
Hello,
yes, I know this window. But either it doesn't support my requirements or I have not found the right parameter.
For me it looks like I can only set clearance rules between 2 copper-objects. This works as expexted.

But my wish is to set clearance to non-copper-objects (pure unplated hole, board outline).
I want to achieve a result as the top track in the picture (small grid-lines = 0,1mm):
track to hole (Pad0=left) -> >=0,3mm
track to copper-pad (Pad1=right) == 0,1mm

With the clearance-matrix I can change the clearance between track and TH-Pad, I have marked thw changed parameter with red. But this influences both cases:
either I set it to 0,1mm (track on the bottomside of the Pads) -> my track gets to close to the drilled hole (and I get a complaint from the pcb-manufacturer) (middle trace in the picture)
or I set it to 0,3mm -> track <-> hole clearance is ok, but on the whole pcb all tracks have unnecessary clearance to all other TH-Pads (lower trace on the picture)

I search a general rule wich distinguishes between hole-clearance and copper-clearance.
 

Offline Joel_l

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Re: Rule difficulties in Circuitstudio
« Reply #3 on: February 27, 2021, 12:47:10 pm »
I haven't tried it, but you might try defining a region or poly around those non copper objects. I'm not sure if regions or polys are copper or not. My thought is they might be non copper areas you can define.

Another thought would be is if it is possible to define a keep out boarder when you create your holes or other non copper shapes.
 
Something to explore.
« Last Edit: February 27, 2021, 12:49:41 pm by Joel_l »
 

Offline mf_ibfeew

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Re: Rule difficulties in Circuitstudio
« Reply #4 on: February 27, 2021, 08:34:56 pm »
>Another thought would be is if it is possible to define a keep out boarder when you create your holes or other non copper shapes.
Yes, this is my current workaround. For every hole I draw an additional circle (on keepout-layer) around the hole.
But on every change on a hole/milling slot an the pcb I have to remember to make an adequate change to the surrounding keepout-shape. It's an additional work step work (I try to avoid all unnecessary work) and I could forget it.
I had the hope to get an easy solution, but it looks like I have to stay with the extra keepout-shapes.
The next step is to create a hole-library and define hole-devices with included keepout-circle around.At least the hole and the related keepout-circle will stay together.
 


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