HaasoscopePro open-source 2 GHz oscilloscope!

[haastyle]

You may recall the infamous Haasoscope, king of the worst schematics in history. (Dave did a 2 hour video based on it, just to explain how NOT to draw a schematic!)

Well I've learned a bit in the past 6 years, and now I've designed the Haasoscope Pro, quite the upgrade - now with 2 GHz of analog bandwidth. Each has 3.2 GS/s, but (before you go all Nyquist on me), you can sync 2 of them, to get to 6.4 GS/s interleaved.

It's now in pre-launch on CrowdSupply...
https://www.crowdsupply.com/andy-haas/haasoscope-pro

Sign up there with your email to get updates as the project launches (next month?), and get first dibs on the introductory pricing for early backers.

All the designs are at
https://github.com/drandyhaas/HaasoscopePro/

Let me know what you think... What could be added or changed... Skepticisms about whether it could actually work... 😁

[lfldp]

You may recall the infamous Haasoscope, king of the worst schematics in history. (Dave did a 2 hour video based on it, just to explain how NOT to draw a schematic!)

Well I've learned a bit in the past 6 years, and now I've designed the Haasoscope Pro, quite the upgrade - now with 2 GHz of analog bandwidth. Each has 3.2 GS/s, but (before you go all Nyquist on me), you can sync 2 of them, to get to 6.4 GS/s interleaved.

It's now in pre-launch on CrowdSupply...
https://www.crowdsupply.com/andy-haas/haasoscope-pro

Sign up there with your email to get updates as the project launches (next month?), and get first dibs on the introductory pricing for early backers.

All the designs are at
https://github.com/drandyhaas/HaasoscopePro/

Let me know what you think... What could be added or changed... Skepticisms about whether it could actually work... 😁

Very interesting project, I wanted to ask a few questions related to it. Do you plan to add a 10mhz clk input to synchronize signals from tested devices? If not, is the current hardware version of this oscilloscope suitable for such a modification? Can you give an estimated cost of making 5 pieces of pcb in JLPCB? Is making them very expensive? Does this pcb have to have gold-plated paths?

[nctnico]

The schematics are still horrible!  The key to good schematics is to connect the signals so people can follow the signal flow. Stuff like power and SPI / I2C can be put on a schematic as labels (or made part of a bus) but the signals should really be drawn between the parts in a schematic.

[haastyle]

The schematics are still horrible!  The key to good schematics is to connect the signals so people can follow the signal flow. Stuff like power and SPI / I2C can be put on a schematic as labels (or made part of a bus) but the signals should really be drawn between the parts in a schematic.

Please look at the latest ones. They've come a long way.
https://github.com/drandyhaas/HaasoscopePro/blob/main/adc%20board%2Fhaasoscope_pro_adc_fpga_board_schematics.pdf

I'm happy to take specific suggestions!

[haastyle]

Very interesting project, I wanted to ask a few questions related to it. Do you plan to add a 10mhz clk input to synchronize signals from tested devices? If not, is the current hardware version of this oscilloscope suitable for such a modification? Can you give an estimated cost of making 5 pieces of pcb in JLPCB? Is making them very expensive? Does this pcb have to have gold-plated paths?

Thanks. There is an external trigger in (SMA on back panel), which could be driven with an external 10 MHz square wave. You would then still be triggering off of the internal ADC clock (800 MHz), but immediately after an edge of your 10 MHz clock. So you'd have ~1 ns of jitter with respect to your external 10 MHz clock edges.
If that is not acceptable jitter performance, there is an external clock input (SMA) that could be used to drive the whole scope, replacing the 50 MHz oscillator on board. But I hadn't planned to route that connection to the back (or front) panel. It's just sitting next to the FPGA.

I'm actually not so familiar with the use cases where syncing with an external device is required, or the specifications of such a setup. Can you elaborate on your setup and requirements please?

The PCBs are not expensive, 5 of them cost about $300. This was only possible by completing the routing on "only" 10 layers, and without blind or buried vias. Not easy, given the 1mm and 0.8mm BGAs with 16x16=256 and 22x22=484 pins, and 56+8 LVDS pairs needed! I *think* you're joking about gold-plated paths - there is standard gold-plated ENIG finish on the boards, but that's not very costly. The usual FR4 does just fine up to a few GHz. Of course you want to specify the stack up and design the traces (and differential traces) to be 50 Ohm, but nothing special is required.
The main cost of the device is the components. Things with 2+ GHz of bandwidth are not cheap. The ADC alone is $180, in quantity 100. Even the relays are $15 each. But it's still going to be *much* cheaper than any other scope out there with 2 GHz bandwidth. Pricing will be announced soon when the CrowdSupply campaign goes live. And early supporters will get a good discount. Sign up on that page for updates.

[PlainName]

Please look at the latest ones. They've come a long way.
https://github.com/drandyhaas/HaasoscopePro/blob/main/adc%20board%2Fhaasoscope_pro_adc_fpga_board_schematics.pdf

I'm happy to take specific suggestions!

I had a (very) quick look before giving up. On page 3 there is an airwire 'INPATH2' which goes... where? Surely not to INPATH24. Then OUTPATH2 on K4 goes to OUTPATH2 on K5, but there is white space taken up by an arrow which would be better served as a wire connecting OUTPATH2/K4 to OUTPATH2/K5 - it is literally a straight line of minimal length. Instead of easily seeing that one is connected to the other, I had to look over the entire sheet to a) find the connection, and b) make sure that was the only connection (but maybe the airwire connects on another sheet?).

Air caps with airwires to power. Just join the + and - rails. They are right next to each other after all! And if they must physically sit close to the relevant chip/relay/ whatever then either directly connect them thus (so it is obvious) or put a note by them.

Q4 and Q5 - what drives them and what do they drive? Is it on this sheet? Life's too short to try and find out.

I suspect there are quite a few more things to be found on that sheet, and then there are another five similar sheets. I think you still have quite a way to go, sorry.

[KE5FX]

The schematics are still horrible!  The key to good schematics is to connect the signals so people can follow the signal flow. Stuff like power and SPI / I2C can be put on a schematic as labels (or made part of a bus) but the signals should really be drawn between the parts in a schematic.

Please look at the latest ones. They've come a long way.
https://github.com/drandyhaas/HaasoscopePro/blob/main/adc%20board%2Fhaasoscope_pro_adc_fpga_board_schematics.pdf

I'm happy to take specific suggestions!

Ignore further suggestions, at least of this particular nature, and ship it.    Your schematics are fine.

[haastyle]

I made some fixes along the lines you suggest. Have another look if you dare. Thanks for your feedback.
There are unfortunately a ton of control lines coming from the FPGA that simply must be on another sheet. Not sure how to indicate that's where they come from, other than with some text.

[PlainName]

IMO that simple change has made it much better - the flow straight through is obvious at a glance. I would suggest connecting the transistor wires to the relays instead of having them floating. It's not like you pay extra to have lines cross, and the won't create an unholy mess. Instead, you won't even have to think what they are doing or what to.

a ton of control lines coming from the FPGA that simply must be on another sheet

Sure, that's normal for a decent project. This is with Kicad, right? I am not au fait with it's capabilities but with other packages you would have off-sheet ports. If you must have airwires on a sheet (sometimes it is complex enough to warrant a couple) then differentiating on-sheet and off-sheet connections would mitigate the airwire issue a lot.

Where you split a project into multiple sheets, if you can compartmentalise the sheets then a top level overview sheet helps to manage things. That will show sheet to sheet connections and will dramatically simplify things for the schematic reader. The problem you have here is a huge number of I/O on the FPGA, and consequently the connections between sheets can make the top level look like it needs airwires. But this isn't unusual and the normal resolution is to use buses. A bus would work well if you have many lines going from, say, sheet A to sheet B and keep the top level clean but informative.

[tggzzz]

Here's one old-school way of doing it for a 350MHz scope.



Key techniques (which are explained in the manual)

• each schematic is a logical component, and is implemented on several boards and the front panel
• the numbers in the diamonds refer to schematics number. This is schematic 9
• a boundary line indicates what's on each board, the board name is given next to the boundary line
• connections going elsewhere are shown "penetrating" the boundary lines
• connections going to other schematics are annotated with where to find the "other end"
• connections going off-board are annotate with the connector and pin
• other annotations indicate circuit operation
• note how complex mechanical components (relays, switches) are shown in a way that does not hide the circuit's overall operation

Coupled with the explanation of the circuit in the manual, all of that makes it very easy to visualise how the circuit works.

I understand that some modern tools may actively thwart such understanding. That is unfortunate.