Author Topic: openvizsla......... still......  (Read 29658 times)

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Offline mikeselectricstuff

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Re: openvizsla......... still......
« Reply #50 on: August 02, 2013, 12:10:49 pm »

I'd have thought perhaps a better way to do this is for the monitor to pretend to be a hub, that way you avoid any loading issues.

That is the last thing you want from an USB analyzer because a hub is an active device at protocol level also. So it screws with timings and with the enumeration process. That is not a problem with a perfect device and a perfect host running flawless drivers, but that is not what we need USB analyzers for  ^-^

For example Last time I had to dive into low-level USB debugging, the problem appeared when the device was connected to a hub, went away when connected directly to host...
True, but I suspect the vast majority of potential users are more interested in reverse engineering and developing device firmware, so may be  a route worth exploring for a low-cost product aimed at these applications. 
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Offline EEVblog

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Re: openvizsla......... still......
« Reply #51 on: August 02, 2013, 12:17:42 pm »
And why should they return the money?

Because your name become shit, and maybe just because it's the right thing to do?

Quote
Read the kickstarter terms - if you back something on kickstarter - YOU risk losing your money without getting anything in return. That is the clear and stated terms.

There is more to life, projects, promises and the social condition than terms and condition on some stupid website you happen to use.

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Less than 1 in 10 projects founded by professional investors actually turn into profitable companies. But it does seem like more than 1 in 10 projects in kickstarter turns something out to their "investors"

It's not really the same game. Although a lot of people will pretend it is to explain away failures and a lack of morals.
 

Offline kaz911

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Re: openvizsla......... still......
« Reply #52 on: August 02, 2013, 01:32:49 pm »
And why should they return the money?

Because your name become shit, and maybe just because it's the right thing to do?

Quote
Read the kickstarter terms - if you back something on kickstarter - YOU risk losing your money without getting anything in return. That is the clear and stated terms.

There is more to life, projects, promises and the social condition than terms and condition on some stupid website you happen to use.

Quote
Less than 1 in 10 projects founded by professional investors actually turn into profitable companies. But it does seem like more than 1 in 10 projects in kickstarter turns something out to their "investors"

It's not really the same game. Although a lot of people will pretend it is to explain away failures and a lack of morals.

We can all agree what the ETHICAL thing to do is - and that is what you and I would try to do.

But once you put your money into IGG or Kickstarter projects - expect ZERO - and be pleasantly surprised IF and WHEN you get your PERK. You do not have the right to anything more. The PERK is not a promise - it is a "If we succeed you might get XXX as an appreciation for your donation" - but many people takes it as a "product purchase" which it is NOT. It is a pure donation.
 

Offline free_electron

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Re: openvizsla......... still......
« Reply #53 on: August 02, 2013, 01:42:52 pm »
Kickstarter is basically a site that deals with 3 words : fool , easily , parted . You provide the money.
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Offline FrankBuss

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Re: openvizsla......... still......
« Reply #54 on: August 02, 2013, 01:59:07 pm »
But once you put your money into IGG or Kickstarter projects - expect ZERO - and be pleasantly surprised IF and WHEN you get your PERK. You do not have the right to anything more. The PERK is not a promise - it is a "If we succeed you might get XXX as an appreciation for your donation" - but many people takes it as a "product purchase" which it is NOT. It is a pure donation.
In general you are right. But they wrote "We have been working on this project in various forms for over two years now, and large parts of the hardware design have already been proven." in the project description. This was in 2010. So the naïve reader would expect that they had already some working hardware and successfully sniffed some USB packets. It is a bit surprising that they change major parts of the hardware all the time and maybe even don't have any working HDL code for the FPGA (see their Github repository: https://github.com/openvizsla/ov_ftdi ).

It's ok, if you were honest from the beginning, saying this is a hobby project, we have no clue about FPGA high speed hardware design and no working prototypes, and we can't promise that we can do it. But if you lied, you have to admit it and at least pay back the money.
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Offline EEVblog

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Re: openvizsla......... still......
« Reply #55 on: August 02, 2013, 02:22:11 pm »
It's ok, if you were honest from the beginning, saying this is a hobby project, we have no clue about FPGA high speed hardware design and no working prototypes, and we can't promise that we can do it. But if you lied, you have to admit it and at least pay back the money.

And that's the kicker. Screw the KS terms and conditions, they are irrelevant from a moral/ethical standpoint.
If you lie (i.e. commit fraud) and don't deliver then you are obligated to give the money back.
If you promise something then you are obligated to deliver, or give the money back.

And by obligated I of course mean by conscience & your reputation.
You may not be legally obligated to do so (it takes a judge to determine that for such individual cases), but that varies greatly from one local law to another. Basically, the KS terms and conditions will mean very little or squat in a court of law I suspect. Consumer protection and other common law have fairly wide scope that trumps most other agreements.
And in most countries, obtaining money by deliberate deceit is fraud, and nothing will save you there. All it takes is one backer who is pissed off enough to take you on.

The backers of these crowd funded campaigns will ultimately determine what is right and wrong, and so far it seems many people have been quite weak and think that the KS or Indiegogo terms and conditions mean something and they have done their money. They only mean something if you let it. People going around pointing out the KS terms and conditions and have the creator is not obligated to deliver anything are not helping, and ultimately it will be self fulfilling prophecy.
 

Offline kaz911

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Re: openvizsla......... still......
« Reply #56 on: August 02, 2013, 03:01:10 pm »
Both Kickstarter and IGG requires you to deliver the perks. But they take no responsibility - and leaves all problem resolution to be between creators and the "purchaser". Which in my mind turns any payment into a donation.

Anyway - I would like to see future "crowd funding" systems where money could be handed over in tranches based on partial goals met.
 

Offline Rasz

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Re: openvizsla......... still......
« Reply #57 on: August 02, 2013, 10:01:14 pm »
Kickstarter is basically a site that deals with 3 words : fool , easily , parted . You provide the money.

So you agree with us that projects that fail like this ones are basically SCAMS and person running them is a scammer and a fraudster (unless he returns money)
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Offline FrankBuss

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Re: openvizsla......... still......
« Reply #58 on: August 02, 2013, 10:57:50 pm »
I don't think that they are fraudsters, because I guess they didn't intent to screw it up so badly and maybe they can still build something. At least full-speed USB should be possible with the hardware, if they figure out how to configure the receiver that it doesn't interfere with the signal. At USB full-speed the FPGA can run circles around the signal and even clock recovery with digital algorithms should be possible, if they feed the differential signal with a buffer directly to the FPGA.

That said, the conclusion might be that you should not fund a project with a cute dog video, only :) , but without demonstrating a working proof of concept.
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Re: openvizsla......... still......
« Reply #59 on: August 02, 2013, 11:15:24 pm »
Even if they could build a USB full-speed analyzer, what's the point? How many people are designing/hacking USB full-speed equipment these days? You should be able to probe USB full-speed with a decent logic analyzer with USB decoding. USB 2 high-speed is the bare minimum to be useful in my opinion.
 

Offline free_electron

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Re: openvizsla......... still......
« Reply #60 on: August 02, 2013, 11:49:12 pm »
Kickstarter is basically a site that deals with 3 words : fool , easily , parted . You provide the money.

So you agree with us that projects that fail like this ones are basically SCAMS and person running them is a scammer and a fraudster (unless he returns money)
Not necessarily.  they may started this with good intent , bitten off far more than they can chew and took a bit of a 'lets wing it and see what happens'...

today they still have no HDL .. their schematics are just a generic fpga with dram and a usb phy (unfit for purpose) bolted on and an FTDi interface chip.
that schematic can be whipped up in less than a day by anyone who knows a coupe of things about FGPa. it doesn't take a genius to come up with that one. some appnotes , some symbols. place and route... give it another two days to draw the board.

the genius part is needed to code the HDL ( the FPGA code) . and that is  a totally different can of worms ...
I wouldn't dare tackle that one. designing the hardware and the pcb ? yep . gimme. i'll cook it up. that sniffer core and the pc software ? that's endless misery ... I already have enough work.

and that is where this project is failing / will fail. recording 1 and zero is only one aspect. building a packet representer is another...
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Offline FrankBuss

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Re: openvizsla......... still......
« Reply #61 on: August 02, 2013, 11:51:15 pm »
Even if they could build a USB full-speed analyzer, what's the point? How many people are designing/hacking USB full-speed equipment these days? You should be able to probe USB full-speed with a decent logic analyzer with USB decoding. USB 2 high-speed is the bare minimum to be useful in my opinion.
A good full-speed analyzer costs still more than their device: http://www.totalphase.com/products/beagle_usb12/ so people would get something for their money, if they write some nice host-side software for it. And many devices, like joysticks and other HID devices, modems etc., are just low-speed or full-speed. And full-speed is still used for many new embedded systems developments, because cheap microcontrollers don't have high-speed USB and it is not necessary for e.g. a firmware update or configuration over USB. But right, looks like the Kinect or the iPhone sync which they mention on the project page are high-speed.
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Offline marcan

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Re: openvizsla......... still......
« Reply #62 on: August 05, 2013, 07:18:49 pm »
Dave, I don't get why you feel that returning the remaining money is the only option now. If bushing can manufacture the design (a USB 2.0 analyzer) with the remaining funds and ship it out to backers with the remaining funds, then what's the harm done? I don't see how, at this stage, returning the available funds (meaning backers get back x% of what they paid and get nothing) is better than shipping them working analyzers (meaning backers get what they paid for, albeit much later than expected). I also don't see how you expect people to be able to build them for cheaper (if the funds are just barely sufficient to manufacture the design in the quantity of the kickstarter, they aren't going to be sufficient for everyone to run off and make their own in single quantities). You still need the sniffer frontend part (USB ports and a PHY wired properly to minimize the impact of the PHY on the link), which isn't something you can just buy off the shelf.

FWIW, the USB3340 is a high-speed PHY, and so is the 3343 (I have no clue where the idea that the 3340 is FS-only came from). Passive tapping via a PHY like this is used in the Beagle USB 480, which is a proven commercial USB analyzer (using the same damn PHY chip family!):
http://www.flickr.com/photos/eric_agan/6994240004/#

Except TotalPhase charge $1.4k for their version.

That PHY has configurable termination, which means it can be put into a mode where it has high-z termination but receives data, which makes it work fine for sniffing. It also supports full/low-speed mode.. I don't know why the Beagle has a separate LS/FS PHY - maybe because the 334x datasheet claims it can't support operation as an upstream FS hub port (it can't decode the mixed FS/LS signaling there, although it can do the host side), so that might preclude using OV as a USB sniffer on an FS hub's upstream port... but that's a very niche use case. Even then, the 334x has a passthrough mode where it only does the differential tx/rx part and passes through raw FS/LS bits to the FPGA, so if you implement your own SERDES for FS you might be able to work around that even.
« Last Edit: August 05, 2013, 07:22:33 pm by marcan »
 

Offline EEVblog

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Re: openvizsla......... still......
« Reply #63 on: August 05, 2013, 10:02:17 pm »
Dave, I don't get why you feel that returning the remaining money is the only option now.

Because it has turned into a complete farce.

Quote
If bushing can manufacture the design (a USB 2.0 analyzer) with the remaining funds and ship it out to backers with the remaining funds, then what's the harm done?

IF???
So far he has not demonstrated that he can't delivery anything after how many years?
Now you think he can deliver starting from scratch again? Come on, get real.

Quote
I don't see how, at this stage, returning the available funds (meaning backers get back x% of what they paid and get nothing) is better than shipping them working analyzers (meaning backers get what they paid for, albeit much later than expected).

Sure, but the kicker is that it's highly unlikely given his past performance (or lack of it) that he will deliver anything at all.
A working analyser won't just magically appear. It requires a lot of time, effort, and expertise. He probably has the expertise to get it done, but he has clearly shown he doesn't not have the ability (for whatever reason) to put in the effort.
 

Offline EEVblog

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Re: openvizsla......... still......
« Reply #64 on: August 05, 2013, 10:08:27 pm »
Anyway - I would like to see future "crowd funding" systems where money could be handed over in tranches based on partial goals met.

That would be great, but then completely puts the onus on crowd funding site to vet and "approve" that task is done. That is time consuming and open them up to liability.
Of course, you could crowd source that part too. Have a "thumbs up" from users that the creator has reached the goal. Get say 90% thumbs up and the next round of funding is charged.
 

Offline FrankBuss

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Re: openvizsla......... still......
« Reply #65 on: August 05, 2013, 10:29:54 pm »
http://www.freelancer.com has such a milestone system, and they handle disputes, if a freelancer and a buyer don't agree. I've used it as a freelancer, just for testing it for smaller programming projects, but I couldn't live on it, because I can't compete with low-wage countries. And I've used it as a buyer, where the results were very variable, depending on the freelancer. Sometimes you get what you want, sometimes you need the dispute system, but they do a good job.

Now enhance it to multiple buyers and you are done. The website has a developer API, so should be possible to integrate it in your own multi-buyer crowdfunding system.
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Offline kaz911

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Re: openvizsla......... still......
« Reply #66 on: August 06, 2013, 03:34:55 am »
Anyway - I would like to see future "crowd funding" systems where money could be handed over in tranches based on partial goals met.

That would be great, but then completely puts the onus on crowd funding site to vet and "approve" that task is done. That is time consuming and open them up to liability.
Of course, you could crowd source that part too. Have a "thumbs up" from users that the creator has reached the goal. Get say 90% thumbs up and the next round of funding is charged.

I actually think the Crowd Funding sites would like it :) that meant they could keep the money for longer and earn some interest :) But yes - a thumbs up thing would be great - in some balanced form as there will always be people who will pressure for "more" to release the money. So maybe both a thumbs up and thumbs down. That also eliminates the "couch potato" voters who does not get their finger out of their "b*t" to vote either way.
 

Offline marcan

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Re: openvizsla......... still......
« Reply #67 on: August 06, 2013, 11:06:47 am »
IF???
So far he has not demonstrated that he can't delivery anything after how many years?
Now you think he can deliver starting from scratch again? Come on, get real.
I've seen the BOMs, with cost, and I have a prototype coming my way (I signed up to help with the HDL... wish me luck), so yes, I think he (barely) can. Probably putting in (more) of his personal money, but he's the kind of person who would much rather do that and get this over with than disappear and do everyone wrong.

Sure, but the kicker is that it's highly unlikely given his past performance (or lack of it) that he will deliver anything at all.
A working analyser won't just magically appear. It requires a lot of time, effort, and expertise. He probably has the expertise to get it done, but he has clearly shown he doesn't not have the ability (for whatever reason) to put in the effort.
I know this project when viewed as a whole is ridiculous at this stage, but the story that he tells about pytey going MIA is true. For the past two years most of the time OV was blocked waiting for pytey to sort out manufacturing issues in Hungary. I'd like to point out that ever since the "Ripping the band-aid off" update (i.e. when bushing wrote off pytey's side of the deal and started driving the project entirely by himself), the entire design process has been open and anyone can watch on GitHub, where there has been a steady stream of commits. Just one month after the restart he has prototypes on hand which are getting shipped to volunteers who will be helping with the firmware. Yes, it's two freaking years and a half too late, but you can't deny that progress is actually being made at a reasonable pace now, no?
 

Offline EEVblog

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Re: openvizsla......... still......
« Reply #68 on: August 06, 2013, 11:43:07 am »
Yes, it's two freaking years and a half too late, but you can't deny that progress is actually being made at a reasonable pace now, no?

I don't know, I haven't looked, I'll take your word for it.
 

Offline marcan

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Re: openvizsla......... still......
« Reply #69 on: September 13, 2013, 10:48:42 am »
Just thought I'd post this update. First USB data acquired and sent back to the host:
http://www.kickstarter.com/projects/bushing/openvizsla-open-source-usb-protocol-analyzer/posts/597816

We've also verified the SDRAM (@100MHz, probably more with HDL tweaks but 100MHz is plenty already). FPGA sizing looks good too; in fact we might be able to downgrade one notch and still fit it in. The next interesting bit to validate is that we can follow USB negotiation / the high-speed chirp in real time. The final architecture of the logic is also taking shape (re: buffering, filtering, etc.) although there are still many details to finalize.

(By the way, migen is awesome. If you know Python and you design RTL logic, you should try it.)
« Last Edit: September 13, 2013, 10:51:16 am by marcan »
 

Offline free_electron

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Re: openvizsla......... still......
« Reply #70 on: September 13, 2013, 01:06:54 pm »
Good work !
Now, after the psoitive note : how long till we see the user interface like the CATC has ? With the nice packet drawings, decoding and all the other stuff.

A command line showing some hex data is so 18th century ...
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Offline mrflibble

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Re: openvizsla......... still......
« Reply #71 on: September 13, 2013, 01:27:53 pm »
how long till we see the user interface like the CATC has ? With the nice packet drawings, decoding and all the other stuff.

If they have even half a brain they use libpcap. Hell, feeding the bitstream to wireshark just might be a wee bit faster than cooking up something new and failing due to Out Of Time Error.
 

Offline mrflibble

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Re: openvizsla......... still......
« Reply #72 on: September 13, 2013, 01:31:38 pm »
(By the way, migen is awesome. If you know Python and you design RTL logic, you should try it.)

Well, I tried it. Tried to find an excuse to use it that is. Read the tutorial + user guide, but why would you want to use this, even if you do like auto-generated verilog?

I am all for new tools in the toolbox, but I didn't get an a-hah! moment when reading the docs... So maybe you spotted a nice usecase that I missed?
 

Offline marcan

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Re: openvizsla......... still......
« Reply #73 on: September 13, 2013, 11:29:33 pm »
Re: UI, I think realistically speaking the #1 priority is getting the hardware to do everything it needs to do, and then ship the devices to backers. I'm sure the software side will benefit from having more people willing to chip in with some help. But yes, munging the output into pcap format to feed it to wireshark is one of the more logical approaches.

(By the way, migen is awesome. If you know Python and you design RTL logic, you should try it.)

Well, I tried it. Tried to find an excuse to use it that is. Read the tutorial + user guide, but why would you want to use this, even if you do like auto-generated verilog?

I am all for new tools in the toolbox, but I didn't get an a-hah! moment when reading the docs... So maybe you spotted a nice usecase that I missed?

It's a bit hard to explain. For one, the metaprogramming is *awesome*. One of the things that bugs me most about verilog is how tedious it is to build high-level structures (things like generate statements and for loops are... rather limited). With migen, you can just use bog-standard Python to make a generator for as complex a design as you want. There are built-in classes to generate things like FSMs, buses (of various kinds and features), FIFOs (async and sync), register banks, etc. Migen also makes clock domain handling easier by encapsulating them into a class that synchronous statements interact with, and it also takes care of reset handling (e.g. you can switch a design from an explicit reset to an implicit FPGA config-time reset by changing one line of code, instead of having to change every always block and register initializer to take out the reset signal).

The other nice thing is that migen draws a hard distinction between the logic (what actually makes it into the device), which is conceptualized as synchronous and combinatorial statementss, and the Python that is really just a metaprogramming language around it. It's a lot closer to the way we think when writing digital logic (i.e. the "registers with clouds of combinatorial logic between them" idea), and it makes it much harder to write code that won't synthesize. I wrote the SDRAM core without a testbench at first, and I had made a single off-by-one-cycle timing mistake - it just worked after I fixed that. That just never happens with Verilog. I also like Python's class model better than Verilog's module model (with migen your entire design becomes one huge Verilog module, and it knows how to rename things so they don't collide within it - so you can freely name things in Python as you see fit).

And, of course, the way mibuild wraps the Xilinx tools and makes it possible to build designs without dealing with the ISE mess directly is great. Its way of defining UCF files is also more compact.
 

Offline mrflibble

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Re: openvizsla......... still......
« Reply #74 on: September 14, 2013, 10:06:50 am »
Okay, that sounds moderately interesting. :) As in, it sounds pretty damn neat! but that is then derated based on past experiences with other "sounds pretty damn neat" things just like it.

How is it in handling say 50% code written in pure verilog, and 50% code handled by migen? Ditto for mixed verilog + vhdl. Because ideally you'd want to be able to mix & match. Say you want to use a PLL core from coregen, plus have some old already proven modules.

Quote
I also like Python's class model better than Verilog's module model

Heh, that is easily done!  ;D verilog is total shit in that regard. So "total shit" vs "not my favorite but acceptable" ... yeah, python wins.

Mmmh, might be interesting to just give it a try. Any good examples to be found besides the stuff provided with the download? As in, any magic places on the internet to find extra resources for it? Because that might be one other issue with using it, tiny userbase.

PS: Ahem, just realized ... sorry for the off-topic.
« Last Edit: September 14, 2013, 10:31:19 am by mrflibble »
 


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