Author Topic: Why drill vias on PCB can reduce inductance ?  (Read 9099 times)

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Offline opa627bmTopic starter

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Why drill vias on PCB can reduce inductance ?
« on: March 19, 2013, 03:41:57 am »


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Offline helloworld922

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Re: Why drill vias on PCB can reduce inductance ?
« Reply #1 on: March 19, 2013, 03:57:10 am »
Inductors in parallel reduce the equivalent inductance, similar to parallel resistors reducing the equivalent inductance.

Larger vias also have less inductance. So why use more vias over larger vias?

1. A lot of small vias may be easier to place on a board than a large via, especially if you have oddly shaped areas available.
2. Even though a larger via will have less inductance, the inductance reduction is roughly proportional to circumference. This increases linearly with radius, while area increases with the square of radius. So you're better off using a bunch of small vias over an equivalent area large via to reduce the net inductance as much as possible.
 

Offline Harvs

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Re: Why drill vias on PCB can reduce inductance ?
« Reply #2 on: March 19, 2013, 03:57:35 am »
Because it provides multiple conduction paths. In order to reduce inductance you need to minimise the loop area between the trace and ground. If the chip's ground path is through a via on the opposite side of the board it will have a large loop area despite having the ground plane directly underneath. So, lots of vias to stitch the ground copper together can reduce the impedance.
 

Offline opa627bmTopic starter

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Re: Why drill vias on PCB can reduce inductance ?
« Reply #3 on: March 19, 2013, 04:05:54 am »
Thanks everyone! I am trying to design a mini USB DAC and I rarely touch digital stuff. I am an Analog guy  :-/O
 

Offline c4757p

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Re: Why drill vias on PCB can reduce inductance ?
« Reply #4 on: March 19, 2013, 04:07:21 am »
Isn't this kind of the analog side of digital anyway?
No longer active here - try the IRC channel if you just can't be without me :)
 

Offline Resistoid

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Re: Why drill vias on PCB can reduce inductance ?
« Reply #5 on: March 19, 2013, 08:59:50 pm »
Hello opa627bm.

I agree with the answers given by helloworld922 and Harvs.

See the explanation given by analog guru, the late Jim Williams, in Linear Technology Application Note "AN47 High Speed Amplifier Techniques", pp.24-25:

http://www.linear.com/search/search.php?q=an47

(You may need to copy the above link, paste it into your location bar and then click on the pdf: I've not been able to get a direct link to the paper itself).

Resistoid.

« Last Edit: March 19, 2013, 09:28:22 pm by Resistoid »
 

Offline jahonen

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Re: Why drill vias on PCB can reduce inductance ?
« Reply #6 on: March 20, 2013, 10:11:45 am »
I have always wondered why there is usually no convenient "stitching via spraycan" tool in PCB design software for placing those ground stitching vias while obeying design rules, just boring regular patterns :)

Regards,
Janne
 

Offline qno

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Re: Why drill vias on PCB can reduce inductance ?
« Reply #7 on: March 20, 2013, 11:39:19 am »
There is a via stitching in the latest Altium version.
I did not use it.
Why spend money I don't have on things I don't need to impress people I don't like?
 

Offline jmc2000

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Re: Why drill vias on PCB can reduce inductance ?
« Reply #8 on: March 26, 2013, 10:52:45 pm »
via stitching also raises and broadens the resonant frequency of the power planes.
 

Offline ivan747

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Re: Why drill vias on PCB can reduce inductance ?
« Reply #9 on: March 28, 2013, 10:06:54 pm »
I have always wondered why there is usually no convenient "stitching via spraycan" tool in PCB design software for placing those ground stitching vias while obeying design rules, just boring regular patterns :)

Regards,
Janne

This can be kind of done in Diptrace, you can place a grid of PTHs but it won't obey design rules. You can also make lines.
 

Offline Kremmen

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Re: Why drill vias on PCB can reduce inductance ?
« Reply #10 on: April 12, 2013, 06:44:10 am »
Really? How is that done, because i would like to use such a feature, but haven't been able to find how to do it in DT.
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