Power Optimizer and Cybersecurity Enhancement! That sounds awesome!
So how do you like this snake oil(?) product for electronics engineers?
CC-100 (there are many variants. USB-plugs, OEM modules, silicon IPs, etc.) is basically an active(?) (super)capacitor IC's which claims to replace need for decoupling capacitors and at the same time decrease your device's power usage, suppress EMI and protect you against cyber hackers when soldered parallel in your processor's VCC. Some of their (randomly selected) claims in are:
- On chip supply line filtering
- 2X improvement in effective capacitance per unit area with respect to typical on-chip MOS decoupling capacitors
- The CC-100 recovers and saves power at the System, PCB, and IC levels of integration with little interaction between Integration levels.
- Internal Energy Harvesting: Up to a 36% Reduction in Dynamic Current and Power)
- 25% Reduction in Capacitor ESL (Effective Series Inductance)
- 600x Large Signal Reservoir Cpacitance Increase over Standard Capacitors
- Draws No Operational DC power
- Reduce RF Emissions from chip power grids
- 36% SWaP (Size, Weight and Power) reduction (Writer's note: An sdditional component! so the power reduction must be +36%!)
- Enhanced System PSRR (Power supply rejection ratio)
- Make systems less vulnerable to cyber hacking. Supresses EMI at 400MHz (The frequencies where the hackers are!)
- "As the Earth only receives a portion of the Sun’s radiated energy, so only a portion of this server and network device generated noise couples to the USB port +5V line. Thus, with this coupled in noise, a portion of this radiated noise energy can be picked up by Hackers and utilized to reconstruct Cipher keys and passwords in computer systems. See the article below for more information on this method of side channel Cyber Attack."
Technical description from the CC-100 IP's datasheet.
The CC-100 IP is a decoupling capacitor with a Cybersecurity Enhancement and an
Energy Harvesting twist. The IP not only does a better job of on chip supply line filtering,
showing up to a 2X improvement in effective capacitance per unit area with respect to
typical on-chip MOS decoupling capacitors, with an added 25% reduction in capacitor
effective series inductance (ESL). The IP feeds back a portion (nominally 20%) of the
bypass current flowing through on chip decoupling capacitors onto the chip power grid,
thus reducing overall chip dynamic power draw. These effects substantially reduce RF
Emissions from chip power grids making systems less vulnerable to cyber hacking and
more secure. The IP draws no current for operation, thus maximizing block efficiency.
Some links:
What do you think?
Where does the line go between a real product and snake-oil? Is this just ultra fancy "power factor corrector"?
PS. They are also offering possibility to loan a device for testing. Any volunteers?