Author Topic: Tachyum Prodigy  (Read 767 times)

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Offline Satan1clauS

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Tachyum Prodigy
« on: November 22, 2020, 01:24:08 pm »
Hi, I would like to ask about this new startup Tachyum, because my friend wants to invest in this company. I really like the new idea of producing HPC, AI, all-purpose   Prodigy chips that that claim will have better performance than the latest most powerful Xeon chips or NVidia A100 chips.

I still can't get rid of the itchy feeling that it is too good to be true. Also, my question is that I don't really understand how they could build something smaller, 10x more energy-efficient and so powerful, what could be the main thing about architecture? The claim in the link provided below that the main problem is the latency of copper interconnections between the high-performing transistors and that by shortening them they can get more work done in the same time period. Also if you could help me find some sketchy things and just help find some main risks that could be the problems, I would be more than happy.

Here is the link to these Prodigy chips from the official company website: https://www.tachyum.com/products
And here the link where they are looking at the architecture and some specs: https://www.nextplatform.com/2020/04/02/tachyum-starts-from-scratch-to-etch-a-universal-processor/

Your help would be very appreciated. :)
 

Offline Satan1clauS

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Re: Tachyum Prodigy
« Reply #1 on: November 22, 2020, 01:28:07 pm »
Also one more thing I just noticed that they have working FPGA prototype, does this mean that their chip is at least working fine or what does it mean?

Also here link: https://www.hpcwire.com/off-the-wire/tachyum-sends-prodigy-chip-fpga-emulation-prototype-to-manufacturing/
 

Offline jmelson

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Re: Tachyum Prodigy
« Reply #2 on: November 23, 2020, 04:55:50 pm »
Also one more thing I just noticed that they have working FPGA prototype, does this mean that their chip is at least working fine or what does it mean?

Also here link: https://www.hpcwire.com/off-the-wire/tachyum-sends-prodigy-chip-fpga-emulation-prototype-to-manufacturing/
It is a prototype so that they can develop software.

The X86-type chips run an instruction set that descended form the Intel 8085, and has had things added on for the last FORTY-plus years!  First, moving it to 16 bits, then 32-bits, now to 64-bits.  All slapped on without a clean re-design.  It is a complete gargoyle!  Then, the chips take the instructions apart and convert them so some kind of pseudo-code which is then processed as a bunch of micro-operations, as data and results flow through the processor.  They have done amazing things with it, but it is really doing it the hard way.

So, I have no doubt at all that a clean-sheet design directed at improving efficiency and performance could make a huge difference.  The holdback is that they want to keep it X86 compatible.  Since all (new) code is now compiled in higher-level languages, backward compatibility is much less important.  Just write the compiler back-end and recompile your code.

On the other hand, Silicon technology seems to have hit a wall almost 15 years ago.  In 2005, we were moving up to 2.5-3 GHz CPU clocks, and we are now at 4 GHz.  That's NOT a lot of progress in 15 years.  Some guys I work with have been developing design methodology for designing GALS chips (globally asynchronous locally synchronous) chips, where major subsections would pass tokens around to keep processes in synch with data transfers.  This gets around the issue of keeping billions of transistors all in total lock-step synch all the time.

Jon
 

Offline Cyberdragon

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Re: Tachyum Prodigy
« Reply #3 on: November 23, 2020, 05:10:08 pm »
They had 3.8GHZ CPUs in the mid 00s, they were not that powerfull by modern standards though, clock speed is only a part, it's overall operations that count.
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Offline jmelson

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Re: Tachyum Prodigy
« Reply #4 on: November 24, 2020, 12:14:28 am »
They had 3.8GHZ CPUs in the mid 00s, they were not that powerfull by modern standards though, clock speed is only a part, it's overall operations that count.
Right, how many instructions does it execute per clock cycle?  But, again, I don't see great improvements in the last 10 years or so.  Small incremental improvements.  I think the X86 instruction set may have reached its practical limits.  Maybe some sort of new instruction set architecture aimed at making code much more parallelizable is what is needed.  Of course, I don't actually NEED any more speed, but the giant server farms always want MORE!

Jon
 


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