EEVblog Electronics Community Forum

Hi there:
   Continued from previous thread, on using Solar Yard Lights, for investigating various switched networks, without interconnecting wires.
   Having some difficulties, getting (proper) experiment settings, and especially, focus on 'edge trigger' logic.  The gist of this is, a solar light contains a (digital) switch, for only operating at night, by using the very same little solar 'panel' as a light sensor.  So, in digital terms, you have a means for 'mixing' various inputs, that are then combined into a totalized 'analog' input, for the level check.  If threshold is exceeded, that means the solar light is now in substantial (ambient) light and will shut off the LED output.
That is basically a 'logical NOR' gate, obviously also useful for 'And gate' functions, equivalent.
  An interesting aside to this; the little yard lights can be operated / switched, by application of two signal 'inputs', optically, where each input is (barely) above
50 %. There things, roughly speaking, can start to resemble neurons, where various input synapses bring analog coded signals for combination.  Of course, there isn't any 'negative' polarity of light, in same sense as electric, plus and minus, but the meanings can still be carried: Most signals, into the solar light, are 'inhibitory' anyway, and inverted logic can conveyed, this time by presence, or lack of presence (of any light).
But in general the inhibitory and actuating aspects can both be expressed, in collections of yard lights, into various relation structures, (like a simple 2-state flip-flop).
   Picture shows, a causally built 'Optical Bench', having top with many mounting holes, for putting gates (yard lights) individually related.  Underneath, is provided various battery packs and solder less proto boards.
A LED blinker provides a light source, for some testing.

This photo showing the transient light (gate on the left) is off, in this view.

This current photo shows a kind of dual-nature, in the sense that, in upper, first example it's all digital, gate to gate, while second example, (lower in photo), shows two inputs, reaching the 100% threshold by combined intensity of light input. 
   So can have either, it really depends on context of use, whether you are getting a 'NOR', (with equiv AND, of 'not' inputs), or you are getting a 'NAND', style, where both inputs are needed, to get a logical output (zero).
It's a bit muddied, by the mixing of analog terminology, for inputs, unusual, with typical digital resolved output.

   For more 'context' illustration, a good example can be a design, for an optically sequenced A to D converter, acting to monitor ambient light levels.
By running a 'calibrated' light source into a gate, for comparison with ambient levels, it can be determined when the threshold is crossed, of a TOTAL light input.
So, let's assume today's light is at '30 %' ...an arbitrary number.  Then, by essentially adding in a D to A generated 'light' signal, the 100 % threshold is crossed when your D to A output climbs up to 70%. Thus you get a reversed or inverted answer result that can easily be inverted, to the correct result, of 30%.
The method is classic A to D by creating a source, via a D to A, for comparison.  Either a ramp style, (slow), or a successive approximation style can be used, in the A to D scheme.
   For the OPTICAL A to D subsystem, each of 4 bits are  (individually) raised, then tested, against AMBIENT, and subsequently canceled, if the trial (light level) went too high. That happens 4 times, for each bit (weight).
At the end, you have a 4 bit result, inverted, but it's an analog measure, of ambient light level.
The sequencer and test logic involves some thing on the order of 40 to 50 of those little yard lights.  Makes for interesting and intriguing exploration of digital analog, and neurological concepts, for sure!

...Keep in mind, those 'analog' values are somewhat static, built in by way of input 'weights', where the actual (sourced) original signals are digital.  That attenuation is a bit 'casual'; often done by way of adjusting the distance between sender / receiver.
Also, possible to use partial blocks, for obtaining a set percentage of original, by the time it reaches the 'solar cell' receptor.
   A more fluid example, of analog 'input' light levels, is where the actual electronics portion is modified, such as placing attenuation controls, etc (but can't be PWM control, must be static DC driving the LED intensity).
   But that's THE TELL, in a regular nervous system, some of the 'analog' encoding is hard/ permanent in the synapse structure. I'm not pretending to know, much, neuroscience, but wishing more Neuroscientists would read the EEVBLOG!

   So, the outline, for doing A to D conversion, is, first, creation / design, of a simple light pulse SEQUENCER, (of course with an optical output clock), where the sequencing outputs come from a series of SPDT switches, (all optical), where each individual switch separates out one output, and then goes to 'chain' output mode, for next stage, in the 10 or so stages needed, for the 4-bit analog to digital converter.
   Some of the A/d converter is 'cheating', in a sense, by using wire extended LED 'duplicates', in some cases, rather than a purely optical setup, (that would demand certain mechanical proximity of four different light beams, of the 4 bit weights).
That photo, showing a three input 'gate' helps convey the context, of having all three input drivers at full (digital) output strengths, but then each attenuated according to 'weights' assigned within the structure.

Hi:
I had been considering, what that little 4 pin (inline) package has inside (?). It controls the battery, solar cell panel and LED output.
But (see prev post), looks a lot like a NPN transistor, a black plastic rectangle, but having 4 leads.
But, along with, apparently digital switching, THERE IS one mode, for having 'analog' on that LED output.
By obtaining negative feedback, by (unusual) way of placing your LED output back against your basic 'input' (Solar Cell), that's feedback by way of the LED intensity, which, BTW seems to stabilize at a rather 'dim' setting, perhaps at something like 80 uA (micro-Amps).
   Otherwise, that LED output is fully ON, at the times when logically that works out (usually, when all inputs are 'dark', or nearly so.(

One current problem is, my 'edge triggering' circuit (made from those yard lights), actually triggers well, and brief, but on BOTH edges, rising and falling edges.

A better view.

This photo shows the on-line Flip-flop circuit, where the first gate is 'Q-not', seen in the left, and is with LED 'ON', meaning illuminated.

Mired in stagnancy / stalemate, that's for sure.
   I've carefully built a couple of separated components; A lamp with reflector that can be positioned independent of main light sensing circuit and battery.
...An upright mounted solar Voltaic cell, on long wires, for the 'bench test rig'.
Plus, a 'Christmas' style LED blinker, for creating repeatable 'Scope traces...
   Now, I can, sort-of, get that goal, of having a full sweep pulse output, detecting a 'falling edge', of a light pulse, but the AMPLITUDE is always low; a dim and very brief light pulse.
It's a lot of 'figiting' and poking at it, as, for one thing, some of those little 'Light Pucks' don't barely emit enough light for causing triggering at the next (component in my edge detect).
   Ever had one of 'those' type stalemate, where everything seems muddied..., and even the failure parts don't express well, or vigorously! (No 'Chi' force, lol).
   At least, I've figured out, the optimum placements, for the 'sensor', vs 'output' (LED), are located in completely different places, relative to other components.
That's why I had to split up one of the yard lights, in the first place.
...more later, thanks.

...here is view, of that separation wall, for the solar cell.

      On The Optical Circuits, Generally:
   Progress on some details, of the bi-stable bit latch, and on the pulse edge-detect dynamics.
A few more sketches on that Analog to Digital layout scheme, a favored aspect because of the somewhat close analogy with neurons (...if I got that right, lol).

   Due to the output weakness of LED light, for causing triggering, one method helps; by splitting a signal into 2 separate copies.  That way, no worries, about 'sharing' some output light, between a couple of different receiver (cells).

This photo shows: I'm having troubles, getting the screw terminal blocks to work, decent, with the delicate wires, often part of a separated, Solar Cell and nearby LED decorative light.
Problem with screw terminal block is the GAUGE; that light gauge wire does not 'squeeze' securely, underneath terminal, and, worse, those screw-down terminals can actually crush / break any soldered or tinned wire lead ends.
Best I'm going for now, is to solder a short (1 inch) piece of heavier solid wire, for direct insert into a regular IC solderless breadboard.

It's the analog aspects, of the Solar Light switching that is interesting.  That's why an example, Analog to Digital conversion, helps show the digital sequencing along with the analog response, and how they relate.
The scheme differs slightly, from conventional AtoD subsystems.
   Firstly, not much hope of going beyond about 4 bits of resolution just simply for mechanical reasons, too many components, in small spaces
Example includes a 3-bit layout, with maximum A/D count of '8'.  Each bit will contribute according to binary weight.  Now, it took a lot of thought, but I've set the A/D system up for 1 count = 200 mVolts.
The 'overflow' value used is '7', a little unusual, but at that scale, a resultant A to D voltage reading is 1.4 volts.  Readers may recall, the value, near 1.35 volts is where device switching occurs.
Conventionally, a different choice would have been, to use overflow (to '8', a binary boundary), and to assign each count as 160 mV each.
   The rationale for using '7', instead, for the overflow, has to do with so-called 'Two's Complement' representation:. Consider, an ambient (light) condition causing something around a quarter of total light, from natural and from (yard light LED) sources:
So, an ambient level, at count of 2, would require the REFERENCE Digital to Analog source to count up, reaching overflow status at count = 5.
Notice, that '5' is directly a complement, of value under measurement: level of '2'.  Otherwise, with more conventional overflow, at '8', will produce a result,..
.I.E. '6'; which would require 'Two's complement' additional process, so total process, for an AtoD answer would then require COMPLEMENT (easy), and then an INCREMENT (slightly tough, using all optical register logic).
   At any rate, the explanation is unconventional, but is mere conjecture anyway: The little light simply switches, nominal, near 1.35 volts, 1.40 volts being 'nicely' represented, by AtoD count of '7'.
   The other unconventional aspect, is that there are TWO analog sources, between the ambient light (about 2 out of the 7 total counts, and the Digital to Analog source, giving out '5' counts worth of light (that would be 5 X 200mV = 1.0 volts. ). Adding then, the ambient contribution, of 2 X 200mV and you reach the trigger level, of 1.4 Volts.
   There was concern, initially, that some A to D full counts are not there, thus some loss of already low, resolution.  However, when asked, to regurgitate an analog value, a Digital to Analog converter WILL produce, normally, all amplitude counts, 0 thru 7, even though original converter only utilized, up to count of five.  All this is normal, as also, when ambient light factor is 'zero', the system has to count up to '7', then invert, to show a correct value, (of 000 binary).
So you have full range and resolution, (within that, crappy counts 0 through 7 range), it's just that most Analog to Digital conversions only involve one single parameter, not two, that have been summed.

   It seemed perplexing for a second, as I contemplated, how to construct that Optical Logic A to D converter, how to bring analog values in, for summing (at the photo cell).  But THEN realirzed, NO, those signals are still digital (meaning rail to rail voltage swing), with analog process only at the destination; the analog weights tweaked by filters, reducing intensity, so that bit 2, for example, the MSB, is done with a '50%' blocking or partially obscure filter. That would be placed in front of the LED emitter for bit2.
Of course, distance to the 'comparator' gate is another potential manipulation method...having nothing to do with the very very very slight increased (light) propagation time, a couple extra inches...that's negligible.
   So there you have it: An intro to a digital gate system, having analog qualities, briefly or in one specific region (near to the switching input).
Reading, in biosciences book 'NeuroScience for Dummie', this is almost exactly similar to neurons, except one (interesting) aspect:
   Neurons do their job, having, sometimes HUNDREDs of little digital inputs (synapses).
I can't solder that fast, but interesting results to be had,
(If I can wrestle out all these variables.)

   "N cans, holding 'N' worms..."

--Rick B.

More filling in the question areas, on the switching characteristics of those Solar Yard lights.
   Photo shows the little PC board, no caps or inductors; just a single resistor, for the LED output current limiting.  The 4-pin switcher, (sometimes called buck converter), is a bit small, there next to the yellow wire and white wire.  Several unfilled PADs seem to imply that manufacture had other options.  This is a step up in quality, over some Dollar Store lights, so perhaps the units sold had been 'downgraded', by process of eliminating (any) possible components, especially a coil for 'bucking' a higher LED drive voltage, than the 1.3 V nominal nicad battery (in other more expensive lights).
   Also, before I forget, a strange use was made, utilizing the SWITCH HOUSING solder terminals as a conductor, (if I'm to believe my eyes).  Only guess I can make, is that there might be other models of garden light, that leave out that on-off switch, while perhaps populating other PC board 'missing' items, L1 coil, and C1 capacitor.  The battery, being a nice (nicad) AA type
holds more promising run time, at night before it drains down.
   But, for the purposes of THIS light assembly the components seem to be bare minimum, for lower price points, and satisfying a growing consumer acceptance.  Ten years ago it was different: the batteries were all AA, and typical units had a centralized driver / Solar Panel, with LED power leads going out to each individual.
Also, earlier units used a CDS device (that's Cadmium Sulfide light dependant resistor).  Funny, those Cds light sensors sat right next to any solar power cell...
I wonder, if there was an 'AH HA' moment ?
(Being that a 'Solar Cell' actually IS a potential sensor.)
   That on-off switch looks like has an option, when in the OFF position, of a second resistor, R2, for trickle charge, even when Yard Light LED is shut off.  So, yes, money was saved, by leaving out the option, for charging (the customer's) battery, even when LED was switched off.  In this Dollar Store thrift version, that penny savings, at the factor, was a GREED option..., perhaps, and in 'the dark' (yeah, a Pun), for any customers, myself included.
There's a couple of other 'short-cuts' seen in some cheap units, such as glueing or even soldering that battery in place.
   But back to my project needs: I've figured out, the LED is essentially switched to ground, on the negative LED terminal, very similar to typical low-going NPN transistor switches.
But I bet...if done over, 2012 thru to now, that particular model would eliminate the switch, and go to AAA batt sizing...just to get into that Dirt Cheap / discounted product.
Nothing wrong with, some, of that 'quality down-grade', as I've heard of older landscape lighting (low Voltage AC) costing upwards of $100 per garden light!
The inductor, in this current style, probably allows for bigger, multi-LED units, while also perhaps a capacitor helped, in some situations, for avoiding flicker, in some situations ...(??)

   Just to be doubly sure, for reader clarity on the commonly known PULSE DETECT circuit, (here done with optical ON-OFF digital signals), pls see photo.
   Substituting an 'inverter' symbol for each Garden Light 'gate' (generic term for logic unit), shows the common electronics circuit symbols, adopted for my garden light collection, on the experiment bench.
Going to the right side of diagram you can see that the final 'gate' acts identical to a TTL setup, in an inverted 'Thevinin equivalent', to a NOR gate; that's all convention.

...oh and some more detail, on the yard light switching circuit:
   That series 'resistor'...I've realized, in series with output LED, is actually an INDUCTOR, green colored, and ohm meter showing at '5' ohms...(I've been reluctant to trace the full circuit, until forced to, by the unanticipated switching. (Priority is more with subsystem exploration, such as that Ambient Light A to D conversion.
The digital aspects of that Analog to Digital converter are a simple challenge, to demonstrate ordinary logic processes, (like edge detection), and binary counters, etc, with commonly known Digital to Analog with comparator included.
   But I think, having that inductor in series, does do a voltage 'Buck convert', I'll have to pick at that later.
Big Clive video mentions the 4-pin 'Buck IC' as being:
   'ENA - 6182', the little transistor sized 4 pin package.
   Ultimately, with some work, I've got a nice, NEURON like set-up, for investigating various analog-weighted inputs, to digital switching subsystems.  But I'm willing to go the distance...
   It's the food cost issues, in this wartime, that bug me,
...I can handle engineering some instructional optically based subsystems.  Of course, there's lots of exciting work happening regarding optical physics, Fourier Transform, etc.   My stuff right now, is kinda like the early telegraph exploration, circa 1840's (!!).
Thanks.
Rick B. in Hayward, Ca

In this view, it shows construction was using some e6000 glue, and a cardboard scrap, as a plate.
   The little lights are the lowest cost,...ONLY one dollar, at $1 .25 each, but I'm getting what I paid for...lowest possible quality.  Plus, they even SPAZZ, like some stupid Zombie movie (not you, Woody)!
Some of the lights go into a 'spastic' blinking, at late night...

My first mistake, while attempting design, was trying to create stuff 'laterally', when what was needed, was a set of processes that move, in depth.  In this case, it is a set of 5 plates, each having 10 potential gates, or just left blank.
   One example involves a so-called 'Direction Latch', where a set of 4 optical latches will capture and hold the latest motion...that made by the sweep of a flashlight.  The logic is fairly simple. Assuming you've started down, left corner, that first, light responding disk will cause all to reset. Then, each of the 4 sensing angles have a dedicated latch
   An Optical Latch structure is a simple, in-line flip/flop, where layers 1 and 2 form an input chain, while layer 3 has the 'SET' gate, (in the cross-connect), and layer 4 has the 'RESET'gate.
Doing all functions, on each flip/flop, requires going with TWO columns, on the otherwise conventional R-S flipflop.  So, the 50 positions, of the (hypothetical) optical sub-system, are fairly well occupied, sensing and producing indicators, of direction, of flash sweep.

This photo shows, schematic for one particular stack of sensing units, where the flip/flop is embedded as an in-line pair of gates, within stack of 5.
You only actually need two cross-connected gates; however another partial column is needed, for the various signals coming into the RS type flip/flop.

There's a lot to explore, still, before the logic block gets my confidence, but it's interesting.  Biological systems, similar to this, encompass HUNDREDS of nerve cells and connections, and 'partial' weighted inputs. (I get stressed, at 'twenty'.)
   The start of some of this exploration, was with a 'random' sprawl of 15 or so 'gates' (yard lights), where I noticed some LEDs stayed on, but the pattern shifted, when I 'scanned' over the array, with a quick flashlight sweep.  Even more curious; some LEDs, in that random jumble, seemed to want to 'store' or latch and hold, according to what I did, with flashlight sweep.  A lot of that 'accidental' function, tracking direction, seems related to (various) deliberate 'edge detect' schemes.
   Now, a next action, after getting basic directional latching, would be some more logic added, (optically), that will shut down any subsequent latching, by inhibiting the other latches, in a one gate only strategy.
That, in itself, adds a lot of simple bulk, to a '10 by 5' logic block.
   Notice the '10' gates, making up one of the five plates in depth, the so-called '10 gate', refers to the X, Y array in the rough, being alternates, 2, 3, 2, 3 across, you could loosely say it's a '3 X 3' or even '3.1 X 3.1' as a reflection of an (X, Y, Z) structure, having a horizontal 'resolution' of about 2.5, so you could approximate as '2.5 by 4'... by 5 deep.
Sounds silly, maybe, but those numbers give an approximate feel to the (optical) logic block, and what kind of sending 'resolution' is available.

   Those separable plates, BTW, would typically be left out in daylight, for charging up (each individual).

It's older news now, as signal flow emphasis is now in the 'DEPTH' direction, but here is the basis, as I had been designing 'laterally', or by wiring LEDs and switches within each particular 'plate'.
   I took the 'FPGA' route here, doing a few connections by default, having inverted copies right there, to use. and considering where to place those big, 6 position rotary selectors, for maximum flexibility, where most all things I need can be dialed in, while some extreme cases can be using full breadboard option.
The 6 position (by two layer!) rotary switch, actually, offers TOO MUCH selection variety, but...I won't complain.
   Most of what I'm interested in, along with some analog processing, is involved with edge detection, rising edge (optical signal) and all.

This picture shows, the use of 7 'gates' for switching and creating a classic EDGE DETECT circuit.  Following the signal path, left to right, that first gate is merely a source, sending in split paths.  The upper path, is far off to the side, (but close), while that tricky arrangement barely works, and had to hand select for best first unit, to send fairly bright and pointed correct direction.  Most fidgety part, was the gate on far end, that acts as a logical AND gate, but both signals must be bright enough.  That is the upper, delayed, INHIBIT signal that will be soon arriving, after light pulse started into the first gate.  The lower signal must travel the 9 inches or so for triggering the final 'NOR' gate there, at right side output end.
   The whole arrangement needs to be indoors, of course, and supplements such as white board walls help.  The 'Output' pulse is very weak, but seems to work, reliably blinking but just only on the 'rising edge' of incoming light that you flash.
These yard lights are very low quality, however...(I don't trust them, beyond basic experimenting).  Plus, that forward operating Edge Detector needs a very precise and 'finicky' layout.  Some of that can be alleviated in doing a bit of re-packaging.

   As the picture shows, one way to implement the Toggle or 'T type' flipflop, the Main f/f is copied, with that simple little action done by 'phase 1' independent pulse, from a sequencer.  That copy, is then circulated around, to input pair, but with intent to reverse the binary value, simply to invert or 'toggle' to other state.
   That's gets me one bit, and that plus another  edge triggered sub-unit,  gets me into 'ripple counter' territory.  Getting into 3-D layout aspects; you get through the 5 layers pretty quick, and using in-line optical gates (seven, I counted), going to the in-line style of layout, is actually fun, like a cross word puzzle...
   I will post that, in a few, but looks like, first glance, would go (layers) 1, 2, 3, 4, and then turn-around at 5.
Then, coming back, other direction on next column, the optical circuit stretches layer 5, to 4, to 3, and to
layer 2.  That's actually perfect,  at least for one of the backwards running signals, as another 180° degree turn around gets you positioned, for the loop around of the 'Copy' bit, with inversion.
   The phase 1 and phase 2 clock pulses originate from 2 separate edge detectors, with square wave. One clock acts, on input 1 rising signal edge, while other will clock on falling edge, all done with light...at least externally.

Good morning!
   An interesting question comes up about sensors, involving LEDs being pulsed.  In the case of these yard and garden lights it is 60 / 40 square wave, 40 % ON, and at 22 khz.  I'm assuming that retains brightness, to human eye, but what about remote sensors, like a photodiode and LED combo, several inches apart.?
The sensor responds to photons, but surely any sensor arrangement would benefit, from a higher ratio of ON to off, or even just using 'DC' type flashlight, having just a simple resistor / switch, rather than pulsed.
   Some older type optical equipment utilized 'choppers' to artificially produce an AC waveform; that way an OP AMP could simply amplify any light input (before measurement or detection).  It could get crazy, though, out there (backyard garden, etc) full of those light sources, all 'vibrating' at 22 khz, while trying to amplify a single one, they would all interfere...?

   At any rate, I figure each 'gate' (yard light) runs at a switching delay equiv to 80 cycles or so, that number obtained from delay time approx 2 mSec.
That's 2 mSec over 5 gates, or 400 uSec per gate. equiv to some 80 cycles of the 60/40 square wave.
The flip flop arrangement works, as well as the (finicky) rising edge triggered circuit.  Probably, giving like 10,000 separate input pulses to it, when using one of the gates as a (hand held) flash, for testing things.
Other logic expected to work, also, generally, which is actually quite weird...

   I'm reviewing the switching details, on using that
 4-Pin IC (for switching control, in each yard light).
A bit mysterious (pls see diagram), as the LED appears to be constantly in series with the inductor, not switched there.  But I believe that's a BUCK CONVERTER, where the LED, on a constant 1.3 V is either a small, negligible leakage, through the otherwise dark (OFF) state, (being below FWD voltage).
Did I get that right ?  A GREEN color, is INDUCTOR,
right ?
   So, if you look to right of LED, is the 4-Pin control IC, and to activate some good light output the IC modulates the pin 1, this to alternate at 222 khz.  That way you get a Buck Voltage increase, each cycle that opens it's switch...Causing inductive surge down thru LED to circuit ground.
That waveform sure does RING...either that or I needed a better scope probe. (Nice old-school Tektronix).
So, (of course when dark), this circuit will keep the LED bright, by the 60% off / 40 % on square wave, at 222 khz.
   My assumption is, that in the setting for evening lighting, it's, maybe, a useit or lose-it scenario...if enough ambient light, from porch, house interior, etc. keeps the garden light OFF, it just leaks a little, through the dark LED, with the Buck Converter not running.
   A little strange, to try to scope out / use multimeter, as the LED seems to always get power.  Plus it seems; any light level to cause 'Switch Off' would, maybe, charge the nmh battery, a minor amount.
   Doesn't matter, if garden light drains out, each night, for the 1 dollar cost of the thing.

   The example Toy Piano in combination with Solar Light's circuitry is a little wild, in the details.  Essentially put into the place, of one Dome (push button) Switch, you get action when a flashlight is taken away, from the Solar Cell, on the test bench, somewhat an expected result.  To detect any key switch closures there is a periodic scan, of each of the three rows, lasting about 1 mSec. and repeating around the 3 rows (repeats about every 5 mSec.).
The positive side of Solar Cell connects to that Row3 scan, as Row 3, Column 5 is the switch for 'Canned' Song examples to be played: Mary had a Little Lamb, etc.  This Row scan is connected to Solar Cell plus (+) while the Cell negative (-) connects to the Toy's processor input, for column 5.  That way, the Solar Cell negative output provides gnd, or even lower voltage, to the Toy's processor.  Maybe not best idea, but didn't break anything yet.
   The Piano function there is started when your flashlight is pulled away: causing the canned song to start playing (as if you had pressed the appropriate dome switch).  I'm assuming you had given (piano key input) a 'zero', which, when source (flashlight) is pulled, causes the function input to go high state.  This is consistent with original Toy logic, where each positive voltage scan can be switched...giving a positive rising edge, for activating the note or function.
   On Row3 scan output, you can even see a little 'spurious' glitch, in the time slots occupied by ROW 1 and by Row 2, within the 5 mSec. or so scan repetition period.
   But these behavioral things need to be noted on paper, as testing progresses, due to a few oddities:
   1).  If you've connected the Solar Cell 'backwards', and while illuminated (putting out DC voltage),  the mechanical wiggling can cause the function to start up.  (I've tried to visualize the input voltage resulting).
Then, flashing my light at the darn thing can cause one of the piano notes to sound...and this is while the 'canned' song runs, simultaneously!
   I'm not going to figure that part out so easy, maybe just note it in logbook.  But certainly does activate piano stuff, connected either way! 
   Leaving that aside, for a second, readers can appreciate; that's a Drug Store Toy device, that provides a set of 3 clock pulses, for other uses, at about 200 hz repetition rate of the typical type keyboard scan.
   Plus, if any readers wish, a good CD 4020 Ripple Counter can divide the 222 khz oscillator signal, I believe down by 14 divider stages, down to some 89 hz if I did the math correctly.
   Dividing the 200 hz keyboard scan would get even lower, some 200 hz ÷ by 16 k if I estimated that
 CD 4020 correctly.
You would want any addition circuit to have independent power supply, like 3 V etc.

   This description is, so far, only covering use of the dc Solar Cell...Wait till I describe using a full, Solar Light circuit, as drop-in replacement, for simple dome switch. (Later).
Thanks.

   For some analog fun, the diagram shows part of the Multiplying D to A Converter.
   In an example 4-bit size, the value '0101' is shown, a typical bit-weighted, shown here by area, adding up bit2 and bit0 (that's a binary '5').  To do the multiply, each of those 'ON' bits allows, instead of a constant value, allows a PWM signal, to be summed.
   This could all be done digitally, of course, (but with the garden lights as logic).
This analog method, doing a Multiplying DAC, does not mean that the PWM makes it through any of the gates, intact...it doesn't.  But it's helpful right there, at the instance, into an Optical Summing node.  In the diagram, the left side example has the PWM intensity level at approx. 30% while right side signal represents about a 50% PCM representation.
If that example is 0101b or '5' out of 15 max., then the result value, of the left side example is 1/3 of 30% or 10%.  Right side is 1/3 of 50% or about 17%.
The threshold is 0.5 Volts, in the comparator, so everything gets normalized at that kind of level.  One method, for doing small normalizing adjustments, would just simply pull the apparatus back a bit, that having a scaling and reduction effect.

   Here is a simple MOD; gets you an LED output pair.  In photo close-up you can see the LED was snipped out where that left a 2-pin 'header'...You can see, that 2 pin cable connector and wire, gets you a lot, for leaving the rest of the garden light intact as-is (although battery life sucks).
   LED leads actually too short to use, but it's only a few gates that get this EXT type interface.
It's convenient with FlipFlops, as the LED output can be extended around a circle type of layout.
Plus, some places need an extra, 2nd. LED.

(Please See previous schematic diagram).
   Looking at the second gate, on the right, the usual Solar Cell has the timing CAP. replacing it; that way the little solar module is comparing for capacitor (timing ramp) voltage, for ending each 100 usec cycle period.
That will need some tweaking, and obviously the battery won't be getting (solar) charged automatically.

   Another concept: there is a way to provide an 'exponential' based ramp, by sequencing up through binary weighted values...a kind of digital generation that would sequence as 1, 2, 4, 8 etc. creating an exponential shaped output curve, (rather than integer counting linear ramp).  Actually, basic digital binary counting registers are VERY bulky, using the garden lights for optical digital functions.

   Frame and suspended rails make a cheap - stable 'wireless breadboard' (pun).
   The broadside view shows 4 channels, of an intended 8 channel Ring Counter Sequencer, for an AtoD converter.  The idea, for open frame, is for quick positioning, while having that structured approx. like I wanted; That is, having four Flipflops, in a 2 by 2 arrangement, and with 3rd layer of gates up top. 
   So the overall is 2 X 3 X 3, where the 3rd, top layer is providing a right to left signal path, then FOLDED over 180 ° (degrees) to come back, towards ultimate sequenced outputs, 1 thru 4.

This view, is the output array,...sorry if the frame cross member is blocking the view, of center layer of outputs, that, along with lower layer, are the 2 X 2 outputs, that go to the 4 bit example AtoD converter.  Each sequencer signal pair does first a SET, then a specific TEST, allowing gate comparator a chance to do immediate RESET, if overflow occured.
   That way, after the SAR sequence completes, the 4 bits Flipflops will hold the answer value,...a 'Two's Complement, of actual analog value, (being also added into the main summing gate.

   This 'thing' is as new, to me, as it is to READERS...
Breaking news, and all that.  The mechanicals, or the 'Fit and Function' design issues dominate the scene.
But that's OK, I have a 'keen sense' (lol), for industrial design and looks.
   That rectangular frame pops together fast, and the (red painted) 'hook rack' does OK, provides parallel rails, but I don't want all those hooks, so they will come off.  It's a bit of a test, and kind of like trying to see how many members of a BASKETBALL TEAM can you fit, into a single bed.  I'd like to see the job description for that...Something about 'fitting' a Tesla Convolution IC, into a, uh...I'm running out of descriptive language!
That's my zone,...good or bad.
   You may recall, in all this mess, that current sub-system is for doing the DtoA portion of Successive Approximation scheme; task is get eight bits all together in close proximity, and shoot that bundle of pixel-joy, into one 'Comparator' gate...along with whatever light beam is being measured.
   Odds are, I have no current competition, which can be good...or perhaps some, devious foreign or domestic SPY group is gathering up all this.
   Patent Office sees 'Novelty',...but novelty don't mow the grass.

  The enclosed photo showing, a total of 32 'gates',
just a first test, each rack lane can handle as many as eight serial-connected, (by light output).  Of course it's cheating, a bit, by relying on wires and LED extensions.
Most of the easy mods are, one is to split the two LED terminals, simply out to a pair, in parallel.
   The nice, and only moderately complicated, is the ANALOG (full, including carry) ADDER.  The left side, has output gate, in RED.

   This photo, shows the empty segment, between two gates.  This is for the combination process, where the (next in line) rather than 'branching out' the process is analog addition, into the little solar cell itself.  Best done with wires coming in, as interior will be host to 5 LEDs, that is, an analog 'A', and analog 'B' plus a D to A  converter, equiv. to about 3 bits binary, or steps of
 12.5 % as the D to A is used, but that is usually figured as 'N-1' so 100 % is the comparator threshold, when switching happens.  Apparently, thats for a cell output voltage close to 0. 5 Volts.
   Of course, no giant expectation, of linearity there, possibly far from it.
   One thought, to maintain that 8 step intensity of LED light, in terms of resolution, is supplementing with a kind of hybrid ' upper digit'.  That would have same resolution, but in a separate analog channel, this upper digit represents, loosely, the (digital) 8 and 16 bit accumulators in 'vintage' processors.
At any rate, 3 LEDs for the Dtoa and you need 2 LEDs for the A + B, the 5 optical intensitys are summed.
If carry, then that immediate ADD is not valid, as the comparator was in 'saturation', above 100 %.
Also, a digital gate, like 3-input NOR, could use that connecting mid-way segment, as 2 or 3 signals merge into the gate's input section.

This photo, of Flipflop package, shows the somewhat continuous cylinder, and then, to the right, the misc gate that gets the Flipflop output, is toppled over a bit to show the look of that half-arc piece.
Thanks

Photo shows:
   That's 10 gates (signal goes left to right), with a simple frame, the straight portion has 6 gates, roughly a Flip-flop having 2 enable gates (4 total).
The round portion, maybe more 'theatrical', in this example that circular part could have the RESET getting distributed, as individual signals.  Notice, that circular portion is 1/2 up, in terms of vertical (gate) spacing.  Various options, but here I want Three vertical runs, of the open rails, going upward, stacked.
   And now, I'm facing the problem, when there's overflow, in analog adder...I'd like to move that 'Carry' out and over, with anything over 3 bits max value.
So, with Analog Full Adder, the light (intensity) could get high enough, at 0.5 Volts, to reach 150 % for example, and would lose the low value, resulting in a value of '1 ??'.  So, I need a way to subtract that 'high digit' portion, for determining the low digit.
   This High Digit channel is analog, and has typical DtoA converter, associated, at 3 bits or 8 discrete levels.  Bringing in a carry, is just a matter of introducing a '1' weight LED output, into the summing gate's square input cell.
   Having 3 levels, and also a twin structure behind this,
all total, is approx 32 gates, where a box-store 'flat' case has 48 Solar Lights.

Thanks for question, Patent Office (in theory), can offer that bit of 'advice', as happened with myself, in so-called First Office Action.
Basically saying, examiner did a 'skim read', and found a catagory, (such as '710 Data Transfer Methods), and saw some potentially 'novel' idea(s).
   The main subject here, is to gain a 'region' I call it, meaning a 3-D space, for analog uses, where distance causes a particular 'attenuation', and electronic sensor surface becomes a 'summing node'.

Right now, photo showing, the DtoA portion, of any full adder system, where the light (going from right to left in photo) is summed, according to weight, the 3 bits being 1 of 8 levels.  Roughly representative of the built in weight network, is the distancing, first the RED LED, being the bit2, while further out is YELLOW LED, and GREEN LED, as bit1 and bit0.
For a 0.5 Volt equivalent, and linear, that's about 62 milliVolts, per step.
   You have to think in digital terms, to understand, a simple 'carry' condition, takes you to the next 'digit', but that's only an analog representation, again at 3 bits, you end up with 1 of 64, but only as a two channel analog, each at 0 to 0.5 volts range.  Point is, with a carry, into 'high digit', you simply add in another
(62 mV) worth of light, or a count of 1, in equivalent D to A terminology.

This photo shows paired up gates, in a cellophane wrap.

Yeah, a 95¢ cent Processor IC could do everything that 'benchtop' maze could do...that's why I try not to get sucked in, to conventional electronics, like wired-in LEDs that, essentially make it more component wired to component.  (I'd like to be able to do some processes, in the spaces 'between').
Right now, working on specifics of accumulating larger values, having, for example, 3 channels, each having weighted value 8X the previous 'digit'.  At that point, those 3 separate analog channels don't have a direct link, to the physical (optical) intensity, but rather are more abstract 'just a number value', but at max would represent some 32 Volts !
That's figured as (D X 64) + (D X + D.
Edit: (D3 X 64) + (D2 X + D1
This editor keeps substituting emoji supposed to be X 8 'times 8'

That refers to having 3 bits worth of accuracy / resolution, for each 'digit''s channel.
   At any rate, I wanted some system that could do the long 'Multiply and Accumulate' terms, needed in convolution, in this case can easily sum up to 64 terms before overflowing the register.  This accumulation must be done in-line, as there is no on going storage.
I'm also hoping any PWM generation can have decent resolution, of signal output.

This is my 'Chia PETs' moment...those little solar garden lights need feeding (sun) every day (or they go into SPAZZ mode.
   The LED output distributor helped packaging, by not requiring various twists and turns, creating a 'branch-like' or tree like split; and having one of the two (or more) inputs be a dedicated LED (wire pair input) helps keep the assemblies as 'in-line' and parallel housings.
   Photo shows, the one deviation, from direct 'in-line' placements, has the 2 gate pair as pointing slightly off-line, that way for placement in bright light, or SUN direct, to charge.
The 2/3 size 'AAA' batteries are limited; to 100 mA hrs.

   Adding gates, into existing indents, you can add another 5 gates, (notice how the original pentagon shape gets repeated, at larger scale).  That addition makes for 11 total gates; 1+5+5 = 11.
   Also, though, these 5-sided shapes will never go together, to solid plane, as there are always gaps.

    For a two-stage flipflop, having input f/f separate from main f/f, that way any feedback actions are not actuated, until the COPY process completes, so any feedback won't cause a flakey response that might affect the input set/reset (until f/f has fully switched).
 
   Picture shows, this is getting into the shape needed, including that oval shaped clear plastic wrap, having 4 sets of pairs, in series order.  Notice, some bias 'lean' for capture of Sunlight, during recharge, while protected enough from nighttime moisture, if left outside.  This way, can avoid major dismantling efforts at end of each day. 
   This is 2 lanes wide, by 4 gates deep, and structured generally as 'SET' and 'RESET' corridors, meaning that usually can be activated, using a hand held flashlight, shining on either input.
   (Please also see schematic, posted next).  That schematic showing the 2-stage copy process, that also requires a 2-phase clock of separate phases acting to copy from input f/f to main f/f.

This view shows, the flipflop assembly SET and RESET output LEDs.

   Here is an example of using an 'inbetween' medium, useful to process some general signal, where the transmit section is essentially a discrete number line, and, in this example, a discrete receiver section takes the output value.  It's very similar to a look-up table.
   Kind of schetchy and general, but you can see, in diagram the yellow color highlighted area is a light diffracting element, prebuilt to perform division.  For better accuracy, an interpolation method can also be applied, to the 'receiver' array.
   The transmit and receive portions can be standardized (especially for what is considered full scale).  Of course you could get silly, and try putting a 'dead possum', into that medium processing space, but that comment really meant to indicate the processing method is all about what is placed there, such as a set of 'filters' that can perform AI 'Pooling', all in one big parallel step.
   For those kinds of processes, you might generally want the configuration to be 2-dimensional...where this example is a simpler 1-dimensional number line.
An example of 2-D filter could be a 2-axis SINC Filter, (useful in convolution)

   Now, back to motivations for this thread.  Stanford University's EE researcher is doing optical systems, that do, essentially a Fourier Transform, down thru layers, in a block of CMOS logic.  That way, the device can do some incredible parallel operations...some 1K by 1K block of pixels, for some 1 million operations, all with light beams as signal. Massively parallel, and plus that project illustrates the application right there.  Sorry, can't remember the Stanford Researcher's name.

Hmm, not quite sure what you are describing there.

Multilayer, massively parallel FFT implementations have been done, of course, e.g. on FPGAs. To do an FFT on 2ⁿ points, you need n layers, each of them combining pairs of data via a "butterfly" operation. But I am only aware of purely electronic implementations, and don't see a benefit from using optical technology there.



On the other hand, the realization that optical imaging can be described by Fourier transformations has been around for a long time. (Joseph Goodman published a book about it in 1968, "Fourier Optics".) By simply imaging an object plane to infinity, with a single lens, you have a done a 2D Fourier transform -- massively parallel, no "multiple layers" neeed, just a single operation at light speed. I believe 1D arrangements have been implemented on CMOS chips, although probably as research projects only.



(Nice and simple illustration of a Fourier transform and then transforming back into real space. But they mislabelled it; should be "Fourier Plane" in the middle, not Focal Plane.)

In the latter case, using light obviously makes sense: The imaging operation does the whole FFT job. But you do not get a similar benefit in your concept, where light is just used to transport scalar analog or digital signals.

If you can find the Stanford reference, I'd be curious. Maybe it is a combination of the digital, multi-layer approach and an optical FFT "core"?

   OK, found it! (Essentially).
   Found the reference, Stanford University E.E. Department doing research on (CMOS) Optical and Wave physics, as mass computational element, or 'core' as a flat disk.
The 10 inch diameter disk serves as a (X,Y) array doing implementation of Neural Networks, having more conventional electronics interfaces, in and out, but based on optical and wave physics in the (middle) 'core', which appears like a plastic disk, with clear surface.
   Still haven't found original video, but the following info is very likely the same Department:

   Stanford University 'Initiative for the Theoretical study of Neural Networks'  video, October 21, 2021.
Lecture presentation by Professor Shanhui Fan, of Ginzton Laboratory.  It's still very relevant to similar 'Deep Learning' methods being researched using FPGA logic, etc.
   The photo (video paused at approx 7:00 minute), shows the round silicon 'wafer' from foundry, that I'm assuming is the CMOS fab, mentioned here a few posts back.  They are calling that a fabrication of waveguide arrays.
Introduction by Professor Vnod Menon (sorry if mis-spelled the first name).
   Lecture starts by mention of energy footprint, of mass computation for Deep Learning networks, being problematic.
Sorry if cannot pin down the exact time (7:00), as YouTube format change doesn't give elapsed time, in video.  But, at any rate, got the right academic department there.  I've noticed that many universities today are CHOCKABLOCK FULL, of required social media, If you want any kind of reasonable communication...that means no published EMAIL contact(s), even....Ridiculous.
Thanks, - - Rick

This 56 Gate monster (see photo), you could term as a crude pantomime of a neural network (visual processor).  It brings a general stack of gates into a form that can be re-charged in-place simply by placing the entire module in a sunny or bright spot.
   As configured, each stack of 7 gates has a sensor (layer 1), various inverters and flip/flops as 1 bit for each of the four corners.  Extended bit storage, to 12, is accomplished via shift register function.
   As in edge detection strategies, this 'cube' can be used to experiment.  For example, a moving light scanned across the top (layer 1) can cause an effect where 'old' status but was present, in older sample, but not now, while current sample (corner) signal is new. That gets to be quite a specific criteria!  (I think a simplified version, that sort of specific motion detection was one-of-seven variations, of conditions.

This latest (photo) is the most advanced so far, as it simply allows for decent 'sunning', for charging up each (of 56) elements.
A helpful feature has the base come apart as two sections; each reinforced against weight of all those lawn lights. Plus I'm testing to assure that all those are getting full charge, each morning, enough to run normal at dusk.
   Free running, a signal quickly runs down a column, about 8 mSec.  This system is designed for synchronized operation, stage to stage.  Each pixel 'pair' is quickly combined, into a 'corner' signal, by Logical OR.  Then, this corner column has one latch, while adjacent column in the pair has another two bits latched, by synchronizing gates.  So all told this 'cube' module contains 8 pixel sensors, combined into 4, and has 3 stages latching those corner bits as older copies.  Very similar to bucket brigade logic, current state isn't latched until Q7 copies Q5, and Q5 copied current value, shift register clocked at 10 mSec per sample.  This info can then be interpreted for motion sensing, etc.

Here's an example, using various edge-detect methods, while keeping two 'history' copies.  The two copies, of the corner detect bits, are each timed at 10 mSec, so first copy at 10, and second copy is at 20 mSec. after current (4-bit) copy.
   An event, such as with a sweep of a flashlight,  can cause an 'ON' indication first on the left, then, moving rightward, a short pulse on the right side sensor.  Nothing this, just for the front two sensors, you have a bit sequence like; '00,10,01...' as that beam is swept rapidly across.
   While this perfect case seems practical, in use there would be, actually something like 4096 combinations, some that make sense, as to detecting direction of motion, many of the permutations or combinations of signal don't make sense, or represent a confused multiple sources.
   I'm figuring a simple, rapid hand movement in the range of 10 mSec, to cross a gate-sensor.

Thanks to ebastler (July 31) for digging up that video by Professor Shanhui Fan, of Oct 21, 2021.
(Ginzton Laboratory).
  Prof Fan talks a bit about edge detect mechanisms, which is part of the convolution and image recognition concepts for AI network.
My setup provides various copies, of single-bit status at each corner, or called 'Q1, Q2, 'etc as 'quarters' of the visual field. One point to make here is that, whether a full set of data points going back over (at least) several discrete time intervals.  Realize: those quarter portion corners simplify the data by logical 'OR'ing whatever pixels get active, so you are losing a bit of separation details, lumping all 4 pixel positions into one, per corner.
   But even that, simplified has a lot of permutations, which I have noted (see diagram showing 2 front corners and a single older copy that is 10 millisec older.). You could work through each possible state, of those 4 total bits, and 6 of them are clear to interpret.  Other combos not so much; consider the 'all bits ON' scenerio or the 'all off' variation, that make logical sense.  A couple of the variations are contradictory in interpretation so the whole set, of 16 possible combinations of present and past samples becomes burdensome.  This is the environment tackled by some 'deep AI', as trendy as that may sound (lol).
  In my musings here, I'm seeing some parallels with the 'Pooling' concepts, to reduce data to more 'symbolic' or 'stereotype', i.e
 identifying a mouth, nose or just a simple curve of some sort, in an image convolution.  Plus, here, with this 4 by 4 pixel array I'm encountering 'expansion' of data that needs to be analyzed due to inclusion of earlier bit copies.

...AND, as appropriate for the base that opens up during component assembly, you can see; the right hand front pair (of sensing gates) can slide open and clear.  That's why that top plate is two pieces.

...it's a little hard to see, but if you look on left column near top, is wire pair emerging from hole in column pipe.  That is for the top driver LED.  Actually, there will be two of those wire pairs for top LED, for MAIN and for Auxillary columns.  That is considered one 'quarter' section, so it's one of four (corners).
Most combinations should be able to be dialed in, but straight and simple point to point (solderless) can be quickly done, also.

   This stuff shows a bit of the independence status of inventors;. Often an inventor has to delve into these areas, like packaging, or ease of use.  Actually, I enjoy those nasty MECHANICAL issues...especially with novel looking devices!  I've done a bunch of crude-rude adjustments, to life-style, as an Inventor!
Ever have to SUE, your own lawyer ?  (Yup, and he won).

   This current picture helps describe the situation;
   The whole 'series' network, of gate stacks, will eventually settle; to an alternating 'On, Off' pattern, (observing as signals going in downward direction, thru those Solar Garden Light modules.)
Currently, my recent re-assembly of 8 columns of 7 levels each, contains AT LEAST 4 gates 'spazzing', simply meaning the charge is so low that an individual gate gets into difficulty, switching on and off at a few cycles per second.
  Right now, it's 7:30 PM  California, just sundown, and a few more minutes gets fully dark. Then, all 8 columns are expected to settle out, into the On-Off-On-Off-On pattern in the 7 gate stack, of inverting gates.
   But NOW, (tomorrow morning), I've got to disassemble the stacks, and weed out the gates that underperform, in terms of chargeable 1.5 V battery.
Many years, patience, doing Mechanical logic, got me 'climate adjusted', to tricky apparatus, (Scotch Tape and rubber bands), so, I don't mind, following EDISON's phtolomy, on invention.
   99 .1 % persperation, in my view.  But, goody, that leaves (me) some territory, to reign over...
   King of the... (fill in the blank)...  It's not so bad, life in Silicon Valley.  Except food prices, skyrocketing lately...
Lol, (you gotta laugh).

  Anyway, the simple test, down through the gate stacks, is to shine flashlight and verify that the whole stack responds...by flipping state.
So, I note the bad spots, for the morning, disassemble the stacks.  Often, it's found that most failures are of battery ' falling' out from spring contacts (due to motion shock), so a quick fix to re-seat the internal 1.2 V battery.

   Some of this project maybe better in 'Projects' section, but it's all, mostly Dodgy...
Picture showing the array of column posts; these can pass wires, up through (pipe) interior.  Right now, I've had to shorten that whole mass.  The whole package, mechanically speaking, is looking pretty good.  Those columns support the components (garden light modules), that I've termed as 'gates', plus they block some portion of unwanted direct light, going sideways from a nearby assembly.
   Expansion of the stack size gets things up to about 17 inches, (1/2 Meter) height (was ~ 14 inches).

Picture showing Base Unit improvements:. Idea is to have a 6-position rotary switch selecting sources, for driving a column top LED.  Various modes of series connections can be dialed in, as in Column 3 output drives Column 4 TOP.
   Picture of (Terrier) puppy included.
   Picture of Optical 'SuperComputer' base included with puppy...
  A couple of places, along each 7-segment column, has some misc. cross-over, or other inter-gate wire connections, for having flip/flop or other customized variations, such as optical logical 'OR' gate function.

Keeping in mind; there's no active components until the terminus, of hopefully a long string of multiplied...that way it's still efficient to revert to electronics, or at least some active optical element.
The method uses a third parameter, in the multiply of Multiplicand and Multiplier, I'm calling the 'Facilitator'.
It's actually, functionally the opposite as each facilitator 'ON' bit will invalidate that bit position.  Each bit, in a TEN bit word, has equal weight, (uncoded), but still notated from right to left.
   So a first multiply would involve a Multiplicand, '5', that is sent into the optical network by electronics, and looks like:.  '00001 00000'.  The other number, the Multiplier '3', is originally supplied in combination, with the 'Facilitator' bits, that de-legitimize the upper bits:
So, Multiplier X 3 is input as: '11111 10000', to be added in analog form.
   Functionally, it's as if the device is ready to stamp down '9' copies, even if this instance needs only three.
So, it's a tentative addition, but also one that collects the valid / not-valid states.  Each of the copies are kept separate, as the whole set propogates (at speed of light).  At end, there needs to be an electro-optic device, that will block, or discard the 'bogus' channel-ways, before actually physical addition, or analog Summation occurs.
   For second stage, in a string or chain of multiplies, the first stage answer is in the proper format, that being a '15' with upper bits flagging bogus spots (Facilitator).
One problem is, answer consists of 100 parallel channels.  In conventional hand-multiply, the answer must get split up, with some sort of method to deal with separate digits and overflow Carey's.
   The 'Zero' term, or bus position is needed for assertive logic, but must be separated out before the analog summing (node).
So, you can see, the overall Bus effect is analog, but can be sent piece-wise, in those separate channels.  Of course, there also is (optical) decay effects, mostly in diffusers, and also a need to normalize signal strengths (actually packets of photons).

(Diagram showing partial term Summation):

   Reading as a signal set that propagates top-downward on the diagram page, is an earlier multiply;
   3 X 5.  The free-space 'BUS', or vertical lanes are read,
right-to-left, with the inhibited lanes shown also.
(Those inhibited lanes are 'permanently' there, until electronic shutter (LCD) blocks each bogus signal).

   Next, a new signal is brought into the stream, that being the result of multiply of 3 X 2 (=6).  That additional set of lumens is special case, having a same Multiplier, being also then with same column structure, of non-valid signals.
   The total then, in the analog stack, is 21 lumens, with 6 of the columns blocked.  Obviously, such an accumulator in digital form needs a range up to 200 counts, when doing a total after 2 multiplies.  The maximum would be:
   9 X 9 = 81 plus another 81, for a digital total 162, literally.  That being with using somewhat arbitrary 1 lumen 'weight' per digital count.

I'm thinking something like, 10,000 separate multipliers, which could be 100 by 100 mm.
Diagram shows, a BUS having 5 lumen, and is only shown right-justified for convenience.
   The diffuser (hopefully) spreads the light out, and evenly, across 10 new 'Laneways' or light conduits or paths...
Then, that re-build word can be subject to blocking, of specific terms, mapped one-to-one.  So, for example, it is 3 X 5, then the Multiplier, '3' gets a Facilitator word:
   '1 1 1 1 1 1 0 0 0' and that flags as not-valid, the columns coorespond with; '9, 8, 7, 6, 5, and 4'.
   The re-build word, is ready to apply that, so the end result is that the full Adder occurs, but only after the electronics activates (LCD) blocking of column.
Full-Scale is 0 - 999 or 3 decimal digits.

   Still chewing on this latest 'improvement', gaining the ability to drop off those bad columns, and go ahead with the full summation, BEFORE resolving the valid / not-valid flagging of columns.
   It's possible to get the lateral or cross-column summation(s) done, but as a set of ten potentially valid results; each of the 10 possible final multiplications can be done, in parallel.  The signals must be split up, into 10 copies,...of course with reduced amplitude, then can be added.
Out of the 10 possible outcomes, the correct result can be distinguished, by the stack terminus electronics, and that electronic section is not required to perform the lateral additions, column to column, as the optical pathway gets to add everything, in-line.
That way the electronics function is reduced, to shutter control, or light deflector control.
In that example multiply, of 3 X 5, the 3 valid columns, col 1, 2 and 3 each contain '5' lumens (of photons flow per second), so the addition result is 15, ignoring any issues with decimal points.  The other columns in this example, do not get into the (optical) summation.
   AND, by the way, this functional gain comes with high price, as ANY structures following will need to be duplicated TEN TIMES!, to cover all contingencies.
   It's an interesting project; Digital Multiply where the words used can also be analog: An analog multiplication result, but that has synchronized or one to one mapping, with a digital signal 'Facilitator' word.
And also with unchecked analog Summation (no set word size).
Very interesting.

   Filters as sensor front-ends can illustrate the set of multiply and accumulate actions:
  This first diagram shows a typical air bourne sound being translated to light beam angle. A partial obstruction before any conversion might help provide modulation of the constant light beam.
The first cone is to concentrate the air pressure waves of the sound, onto the cone or diaphragm for variably reflecting some light beam.

   Of course, there are other, easier ways to get some ratio, like here it's 1 TO 0.5 ratio.  But here, to illustrate, the starting and ending Lumins are close enough, to allow chaining, some.
The values are input direct (currently, no delay), multiplied by 6, and a 10 mSec delayed signal, at 5 X.
Because of the divide by ten side-effect, those become
times 0.6 and 0.5...
   But the whole point is, a total 16 Lums comes in, and total 9 Lums gets output, so the chaining of stages hopefully won't bring the signal down, excessively (like ÷ by 10 would, if at each stage).
   Those values shown, cartoon style, are valid, and ready to be summed, (laterally), as the LCD shutters are blocking the columns that aren't part of the conditional addition (summation).

Picture Shows:
   It's ackward to get last, tenth LCD shutter element in,  that 3 by 3 array makes a nice square shape, of active 'light valve' elements.  A 'tenth' little square allows for doing a '99' output, but also a number like '52' would have a two worth of light admitting opening, supplementing the higher-weight 'tens' digit (channel).
If 10 actual pixel locations are used, then that's going to use 30 pixels across, to do the 3 squares, plus any spacing...
   One key, is that the lower represented digit is still strong; being 10 X too big, by weight.  So conversion to actual template involves reducing that, before all is merged.  That '52' being '5 regular squares', plus 2 of the little (ten times less).  Actual filter performance, for light intensity or amplitude, would be 52 out of 100 as a ratio of input to output light

   At any rate, doing things like this, mostly motivated by the advantage of having more resolution, you could have something like;
   (Instead of just '6' X '7' type of one-digit resolution),
   149 X 52 (that's approx 7500)
For that, in a binary range of 0 thru 8196 (or 8 k), that's going to be 13 bits AtoD conversion.  So, by keeping 10 bits, converting as 0 thru 1023, or better thought of as 0 thru 999, decimal, you've got the better accuracy, 13 bits, in your accumulating light beam, with a 'truncation' of 3 bits at the final, AtoD after summation.
That helps keep rounding errors out, as the Multiply-Accumulate 'stack' has many terms, for efficiency (hopefully).

   Picture features a 'wanna-be' BUS style, perhaps...if I can figure out some coherent approach.
   Idea is to have separate analog channels, one for each decade, staged much like conventional decimal numbers, X 10 for each next column.
   That 3 by 3 configuration gets you up to nine...and then you might also need another '9' set of loose digits, meaning that you would be combining 9 (X10) + small digit X1.
   It's pretty vague, right now, but has a 'Self-Similar' structure, when going down into lower weight digits / columns.

This third diagram, today, starts to show the type of game to be played:
   Idea is to pre-position as many BUS signal blocking flaps as possible, so that the column of multiply and accumulate actions are as deep as possible...(so that only the fast calculation, of multiple conditional adds takes place).  That part is fine...but only with condition that the 'lateral' summations only include valid columns.  Funny thing is, you can still proceed, down that column, even when not knowing or resolving what you have.  In this case now, you've got a 2-digit multiplier, going against a totally wide-open analog value, as the multiplicand. Some preliminary thoughts there are to use, perhaps, 14 bits worth of analog value, but use a 10 but converter.
That way you've got some extra capacity, in the two numbers to be multiplied.
   Oh, and at the finish, of any progress down the calculation column, you might have something like;
   5, 5, 5 in columns 1,2 and 3, in some other multiply, plus a '149' constant added in, to column #1.
What this means is you will see:
   '5', '5', '154', ...which of course is unbalanced, or not evenly distributed across the analog columns.  The process that I have (attempted) been describing, would lateral sum every valid column, and that ends up as '164', which should be dividwd up into ten element pieces, of approx. 16.4 each.  That way the vertical summations can proceed, down the remaining elements in columns.
   Confused yet ?
Welcome to Rick's world...

   Here (please see photo), is some glimpse, of design considerations for a practical optically operated analog BUS.  While doing a wide bus; of 100 signal partitions (I.E. uncoded bits).  It lends itself as a better shaped format, keeping the 10 BUS lines in a centralized or circular - square organization, better to use while diffusing or making signal (cross section) uniform.
I'm not confident, exactly, yet, but making progress on this whole summation column method.
   Notice, I've simply tried methods to obtain 10 signals, for a decimal BUS read, and various size adjustments put each individual element on equal footing, in regards to an even (as possible) diffusion of total light, into a 'portion' for each conditional addition column.
I did the 5 decades, in the number '52', while the 2 'units' value also are included.  Actually I don't like that; as it mixes between the weights, so that format is a little 'shakey', but readers should be able to realize and follow the function...(whew!).

   It can be disorienting, doing inventing / building inventions.  There is no obvious  set pattern, in the novel stuff...(but that's by definition).
I believe that one of the helpful qualities of a technology involved inventor is TOLERANCE, ...tolerance for unpleasant conditions, (hopefully transient!).

Mk14: Regarding a delay time.
  Thanks for that ref., I believe the switching time, as inverter, was for the (solar cell with switching IC, and battery.). That way, (maybe) the real switching being done is by way of using the solar ev cell voltage, at some comparator level, 0.5 or half-volt, I believe.
   That's why, using a series string of those little, dollar store type lights, can, actually pass MUSIC... Although wildly exaggerated,...but it does work, to some semblance; The sound passed consists of punctuating 'Hiss' sounds, to the 'beat and cadence', of the music.  Plus, some of the mid-range sounds make it through, down a series line-up of those 'gates', that being the inverting action of the solar lamps, each sending light to the next, in a series string, (of 8 separate solar lamps, acting each as a logic inverter).

   I figure to have a thousand multiplying processors in 32 by 32 Array, and here's the numbers outline;
   Using a basic 4 pixel wide LCD square (4 by 3), that could fit into 10 pixels, including border.  So, a 3 char by 3 char array, covering unit weights of 1 through weight '9', (in light intensity), would be 3 X 10, or about 30 pixels across, to implement a light emitting 'square', (or at least a light valve, for whatever light source.)
For that, an array of 32 across would use 1000 basic pixel spaces,...about right for implementing an experimental passive processing structure

   For a signal processing 'session', lasting 100 mSec, an electronic CPU or GPU will pre-arrange the configuration, for a burst of utilization, doing fast bundle-jobs, of multiply-add nature.
Envisioning up to 10 multiplies, each, for example;
   '21 X 56 = ' and being accumulated, into 14 bits equivalent, for example.  That being a total AtoD count of 16 k, and (estimate) using 10 bit Ato d, at high speed.
Excess range is really just an analog accumulation, of light intensity, but rough equiv. voltage estimate range of 1000 counts, representing 0, 1 mV through 1 volt (0 thru 0.999 V).

   Looking at various BUS formats, the 'Harmonica', or Piano BUS style encodes as binary-looking 'bits', but it's a one and only one, exclusive type of code..., or actually an 'uncoded' signal.
The right-justified variation is just about right, for doing outputs, although zero gets a little strange.  That's when you'd like an active zero form, of the raw signal, for clocking or pulse recognition.
   But, doing weights-only, this system produces 'Stamps', very reminiscent of video or graphics stamp blocks.  Each of those little squares contains an even amount (of light lumens) and thus the multiplication action happens...by way of multiple addition right there in the 9 squares of the 3 by 3 array.
   (Reminds of the Pop-art Warhol photo art, where the face of Marylyn Monroe gets repeated, in little cells, across the art-poster.)

Those patterns, remind me of gray code.

https://en.wikipedia.org/wiki/Gray_code

Even though, they are not really related, to what you are discussing.

would be set of LCD 'flaps', closed for the transient duration, of a session, like 100 milliSec. and that feature would keep any summation as valid.

You might find that LCD 'flaps', have a fair bit of (light) attenuation, when they are supposed to be fully open (off).  Also, you may find that the LCD 'flaps/squares', pass through some light, even when they are supposed to be fully 'Black'/Opaque (on).

Additionally, LCDs tend to be somewhat (relatively) slow, so 100 milliseconds, may not give (especially a low cost, simple, non-optimized version, salvaged from something version), brilliant (ignore the pun), results.  Finally, the LCD screens polarizer, may also worsen your results/success, in various ways.  Such as reduced brightness/contrast (compared to something which is genuinely fully open or fully opaque).

Faster/fast LCD panels, are possible.  But harder to source, and possibly more expensive.  Even then, they tend to be fundamentally, relatively slow, compared to many other things (in electronics).

   I think you were trying to say, (Mk14, thanks), is that this conversation is reminiscent of 'Grey Code';  mildly suggestive, that serial data experts HATE long stretches, of 'dead' line time... That's instinctive from radio operating days.
   The optical equivalent, involves how to, effectively transmit a 'zero', in an active way, preferably.
In a (hypothetical) weighted word, on a BUS,  the zero case has no analog weight, but is very important, as a digital token.  This means, that, for example a '20' has that zero symbol, but it is as a place holder, which is different from a 'count'. A very subtle point, but ..
   Another fine sticking point has been the appearance of 'nine' squares of light, to represent values, in a decimal system...No end of confusion there !!!
But it must always be back to a X 10 relation, your x1 symbol must be X 10 across each column.
Of course, the '3' is '3/9' ... of that set I've shown, of a 3 by 3 array, but that is, further a block meant to represent ' 9/10' of a decimal number.
So, combining that math, it still works out:
   '3/9 th X 9/10 ths, is = 3/10'
So the point is; that array can represent in terms of tenths, not 'ninths', as long as carefully about use of area.

   You can't SUBTRACT the analog light values, but you can take a 'proportion', or split off a ratio proportion.
So, with an amplitude value of '142' as example, that arriving light could be split, into ten paths, each being
'14.2', as evenly as possible, and 1 of those paths diverted, over (laterally, or X10) into the next power of ten column, or 'macro-column'.
This action gives a multi-digit multiply approach resembling regular 'carry-over' as the early school math teaches, to carry a 'tens digit' over, after a partial multiply. Doing, say, 9 X 9 = 81 suggests sending the '8' portion over...; over to the left to be tabulated in that 'tens' column.
   In this case, optical BUS, the carry-over could be 10 %
 and unconditional, but would also do carry-over of a number like '8', where the action is to carry over a '0.8' to the next higher macro-column, while leaving 7.2 n the one's column.
   Did I mention this shii can be confusing
   The expected actions would have been, to keep all of the (light quantity) in the first, lowest column, the 'ones' column.  But the total quantity is not lost, it is just moved over and gets totaled in next column over
   Now, as to magnitudes, the lowest weight column is physically separate, and does not match, physically, being 10X too big, in magnitude.  The consequence of this is that a carry-over, like the '8.1' in '81' can be easily put through a divide-down, by 10.
Actual is 0.9 X 0.9 = 0.81 and so the actual carry-over is 1/10 or 10%, and that's = 0. 081 literally.  That sizing fits perfect into next column ACTUAL amplitude, as a carry, albeit a little different from a purely single digit, it's expected to be, '0. 08'.
   Not really that confusing, just new...The total light quantity is simply done differently, but result or 'summation', across laterally, across the bottom of column, should always be same.
This method is shown, in a few recent posts, where a number like '0. 184' is expressed as '0.1', '0.8', '0.4'.
That's an amusing variation, of course needing to keep the three separate, and need to attenuate the low digit, when doing any full summation.

Here is view of that unconventional carry-over.

   Picture shows a stack with 2 bursts of the multiply and add series of calculations.  The design goal is to get as many stages included as possible, for the very rapid optical process...in order to exceed that speed conventional electronics ALU is capable of.  So, the more of those, example, multiply by '5' digit multiplier, the more the better, as the LCD liquid crystal takes time to close or open, in preparation for AtoD reading, as the light beams perform the calculating (see also prev. explanation, on the conditionally used columns).
   You can see, I've tried to imagine / illustrate that stack timing performance.  Other folks, apparently (Professor Fan at Stanford Univ.), are examining the technology from an energy use point of view.
   In the picture, the green line, traveling down the page, is to represent how the older method was intended to track the validity, down the columns, but it's simpler to just write directly to the LCD light blocking, as CPU already knows which summation columns are not valid.  The older idea was as a 'live' bus signal...I.E. the Facilitator word, which could be set by misc. processes moving down the whole stack.

   I was pleased to realize that it IS possible to get close to 'SUBTRACTION', while doing math with controlled light beam's amplitude.  That is, a ratio like
' 9 to 10 ' or ' 1 to 100 ' can be set up, similar to the preceding example of using unconditional separation, evenly, using light guiding conduit walls.
   The Stanford researcher, Professor Shanhui Fan uses the term of 'Processing using physics, such as diffraction effects'.
I like to use a similar action descriptor, of 'Processing by BUS' which mainly refers to structurally modified bus lines, such as a rightward shift, among BUS columns, to get a value change, of amplitude value.  That's a tantalizing functional advantage, as compared to contemplating subtraction of light intensity.
   By doing ratio-based, and unconditional amplitude reduction, it's possible to 'count' those ratio portions down, while possibly using the set of values as it 'decrements' the number.  Can't conceive any way to detect a zero ending, in typical FOR-NEXT loop style, but existing techniques for coding an 'un-raveled loop', by simple listing each iteration explicitly, can be used, in a stack of optical manipulation elements.
That is, in cases where you'd like to use the iteration count as part of some calculation, on each loop iteration.  The way to do that would be to split off some light for the current processing element, from the 'iteration count stack lane'; use that in the current element, meanwhile the main light conducting lane continues down, to the element, in your unraveled For/Next line of processing element stations.
For example the structure could 'process' each in a series of '9, 8, 7, 6, ' etc and all of it unconditional, where that iteration count is sent over to some other module, as input.
   Doing that requires a simple series of reflectors and partial reflectors, for manipulating your light column.
By analogy, very much resembles the bit-shift instruction enabling complex operations like divide by 4, or multiply by 8.  This applies to whatever BUS type, but here the 'unit weight' BUS is favored (over typical binary weighted).