Beginner PCB review request - RF Amp

[cadr]

Hello,

I was wondering if I could get some help reviewing my first PCB design.  Please find attached below.  (Post edited to include PNG versions of the schematic/board layout so you don't have to download the pdf)

I am trying to design one based on W7ZOI's Bidirectional Termination Insensitive Amplifier (pdf here: http://w7zoi.net/bidirectional_matched_amplifier.pdf). While I have been doing various amateur radio homebrew/general electronics off and on for a while, I've never designed a PCB. I wanted to order it from JLCPCB and have them assemble it as well, as it seems that if it is small and uses all "basic" parts, it is quite cheap per board.

I am planning on doing it single-sided. The large-ish pads on there are for soldering the wires to connect the parts or power the two parts of the amp. I usually build on copper clad board using little manhattan pads, and use short length of coax to connect them (sometimes I use BNC connectors, but wasn't going to here).

I'm going to use these below 14MHz (20M and below), hopefully as part of some BITX-like SSB.

Thanks in advance for any and all help!

[phil from seattle]

A suggestion about asking for help - put the images inline rather than requiring me to down load them.  I've got enough clutter on my machine as it is so I generally don't bother if it requires a download (and subsequent scrub).

On the image you did put up, it shows a couple of silk screen labels on copper - you probably want to move them. I'm not sure what all board houses do with that but the ones I use don't print on copper.

[T3sl4co1l]

No bottom side copper?  No stitching vias?

Quite generous space between components; which probably doesn't amount to much impact, as the bandwidth isn't going to be crazy or anything (with '3904s, 10s MHz?).

Tim

[cadr]

A suggestion about asking for help - put the images inline rather than requiring me to down load them.  I've got enough clutter on my machine as it is so I generally don't bother if it requires a download (and subsequent scrub).

Good call - I've updated my original post to include png versions. 

On the image you did put up, it shows a couple of silk screen labels on copper - you probably want to move them. I'm not sure what all board houses do with that but the ones I use don't print on copper.

When you say "on copper", do you mean the exposed pads (such as where the "RSIGGND" text is going over the exposed copper) as opposed to going over unexposed traces (like where the "R18" text goes over an unexposed trace)?

[cadr]

No bottom side copper?  No stitching vias?

Quite generous space between components; which probably doesn't amount to much impact, as the bandwidth isn't going to be crazy or anything (with '3904s, 10s MHz?).

Tim

I mean, I could do a bottom side that was all copper and add stitching vias, I don't think that actually impacts the cost at all.  Is that a better practice?

Would you suggest I move the components closer together?  And any suggestions around the general component placement/trace width/etc?

Thanks!

[T3sl4co1l]

YES, definitely better practice.  Having a solid ground around everything, means you don't have to worry about what you're "standing" on at any given point in the circuit.  Ignoring it, can lead to antennas, resonant traps, oscillation, etc.  Example, what good is C6?  Its return path has to go all the way around R1, C1, R2 and R6 on the left, and R10, R8 and R9 on the right before it connects to any other grounds.  It's still something, sure, but it's not as good as it could be without that huge slot between ground regions.  (I still doubt that this would have much effect -- the slot will be equivalent to maybe 40nH between sides, and resonate at, probably near 1GHz.  Nothing 3904s can do by themselves, though they could rectify interference received by such a slot antenna -- a GSM cell phone might produce interesting results I guess.)

You can smooth your traces and pad entry, too.  Every single transistor could have ground connecting underneath it, but doglegs block all but Q6.  The consistency almost makes it look intentional... 

I also see ugly random bits of trace, like on C9, R12 (GND), GND beside RV12, and LGND.

There's also weird asymmetries, like R3 has no copper under it, but R18 does (because the trace between R20-C4 clears C7 and R17, while the R1-R3 trace doesn't clear C5, R4.  And why are those pairs of components not the same (R and C clearing C and R, vs. R and R clearing C and R)?

I also prefer to keep traces strictly connecting to pad corners or faces, avoiding acute angles.  This doesn't really affect anything (maybe a tiny bit of pad peel strength) but I think it looks better.  And it's "artwork", it should look good, eh?  Make an art, don't just throw traces at it lazily and pray the schematic holds -- the PCB is a component as much as anything on it, and a bad PCB absolutely can ruin a good circuit!

HTH and good luck!

Tim

[cadr]

YES, definitely better practice.  Having a solid ground around everything, means you don't have to worry about what you're "standing" on at any given point in the circuit.  Ignoring it, can lead to antennas, resonant traps, oscillation, etc.  Example, what good is C6?  Its return path has to go all the way around R1, C1, R2 and R6 on the left, and R10, R8 and R9 on the right before it connects to any other grounds.  It's still something, sure, but it's not as good as it could be without that huge slot between ground regions.  (I still doubt that this would have much effect -- the slot will be equivalent to maybe 40nH between sides, and resonate at, probably near 1GHz.  Nothing 3904s can do by themselves, though they could rectify interference received by such a slot antenna -- a GSM cell phone might produce interesting results I guess.)

You can smooth your traces and pad entry, too.  Every single transistor could have ground connecting underneath it, but doglegs block all but Q6.  The consistency almost makes it look intentional... 

I also see ugly random bits of trace, like on C9, R12 (GND), GND beside RV12, and LGND.

There's also weird asymmetries, like R3 has no copper under it, but R18 does (because the trace between R20-C4 clears C7 and R17, while the R1-R3 trace doesn't clear C5, R4.  And why are those pairs of components not the same (R and C clearing C and R, vs. R and R clearing C and R)?

I also prefer to keep traces strictly connecting to pad corners or faces, avoiding acute angles.  This doesn't really affect anything (maybe a tiny bit of pad peel strength) but I think it looks better.  And it's "artwork", it should look good, eh?  Make an art, don't just throw traces at it lazily and pray the schematic holds -- the PCB is a component as much as anything on it, and a bad PCB absolutely can ruin a good circuit!

HTH and good luck!

Tim

Ok, I will get to work on that here later tonight or tomorrow.  Having never done this before, I only have a vague idea what to do though
It sounds like step 1 is to do a copper pour on the bottom, then start adding vias.  Is there a best practice as to how many to add/where?

When you say "every single transistor could have ground connecting underneath it" - I don't quite follow.  Sorry I'm being dense, but what should I do there?

Thanks for you feedback!  It is very appreciated!

[T3sl4co1l]

These:

[cadr]

Ah, that makes sense.  Thanks T3sl4co1l!

[tszaboo]

My suggestion is this:
If you never designed a PCB, dont start with RF. Even if it is low frequency RF.
Make a headphone amplifier, or a LED blinky or a circuit which measures temperature. Something that you can debug if it doesnt work, and you understand what it does.

[cadr]

These:

I *think* I made the changes you suggested.  How does this look?

[cadr]

My suggestion is this:
If you never designed a PCB, dont start with RF. Even if it is low frequency RF.
Make a headphone amplifier, or a LED blinky or a circuit which measures temperature. Something that you can debug if it doesnt work, and you understand what it does.

Well, see, that would just make too much sense. 

That is a good suggestion.  I will look to do that.  Thanks!

[T3sl4co1l]

Stitching looks OK.

Why not move the traces to improve fill, strays, and symmetry?  It's not like they're made of steel...

Tim

[cadr]

Stitching looks OK.

Why not move the traces to improve fill, strays, and symmetry?  It's not like they're made of steel...

Tim

Do you have an example of somewhere on the board you would suggest moving the traces?  I'm not sure what "strays" are here.

Thanks!

[T3sl4co1l]

Strays are generally trace length.  At high frequencies, a trace above a ground plane (or surrounded by it, or both -- what you have is known as coplanar waveguide with ground (CPWG)) is a transmission line, which has characteristic impedance and velocity.  Signals don't move instantaneously, after all.

Which is one of the conceits of schematic representation: there is no way to indicate length, it's assumed zero-length -- pointlike -- or equivalently, assuming infinite speed of light.  So it's easy to get tripped up between schematic and layout, when those dimensions matter to the circuit.

At low frequencies, we can reduce transmission lines to equivalent series inductance and shunt capacitance.  For traces around 100 ohms, these are around 1 nH/mm and 0.03 pF/mm.

It doesn't sound like much, but it adds up, and circuits don't have to go much faster than this to really feel it.  Most CMOS logic parts (gates, MCUs, etc.) are fast enough to have wave / transmission line effects on traces merely 10s of cm long.

For example, what about the -- uhh, none of these nets are named so I have to describe them by component members, don't I --  R1, R2, C1, C5, Q1: this net makes a fork between Q1 and C5, when they could all just be in a row, C1-R1-R2-C5-Q1, packing everything closer and about halving the total trace length.  R4 should be right beside Q1, it's a local feedback path, delaying that is a bad idea in general.  Why not butt Q1-Q3 all together?  They share many connections, they don't need all those ugly corners and extra length between them.  I don't even know how Q2-E to Q3-B jogs up above the pads, it's like they were routed to make the signal follow the component centerline, not the pad centerline.  Which seemingly intentionally blocks off ground fill between pads, necessitating vias to connect it back up.

Oh, what's up with the different size components, 0805s and 1206s is it?  Just now realizing they're different...  All 0805 or 0603 should pretty much do for everything here... you might not like 0603 so much for beginning hand soldering if that's what you'll be doing, but 0805 I would say is fair game.  If your hands are a bit shaky or your vision not so sharp, 1206 might be more comfortable.  Or you can do everything through-hole, this circuit won't care.

Tim

[cadr]

Strays are generally trace length.  At high frequencies, a trace above a ground plane (or surrounded by it, or both -- what you have is known as coplanar waveguide with ground (CPWG)) is a transmission line, which has characteristic impedance and velocity.  Signals don't move instantaneously, after all.

Which is one of the conceits of schematic representation: there is no way to indicate length, it's assumed zero-length -- pointlike -- or equivalently, assuming infinite speed of light.  So it's easy to get tripped up between schematic and layout, when those dimensions matter to the circuit.

At low frequencies, we can reduce transmission lines to equivalent series inductance and shunt capacitance.  For traces around 100 ohms, these are around 1 nH/mm and 0.03 pF/mm.

It doesn't sound like much, but it adds up, and circuits don't have to go much faster than this to really feel it.  Most CMOS logic parts (gates, MCUs, etc.) are fast enough to have wave / transmission line effects on traces merely 10s of cm long.

For example, what about the -- uhh, none of these nets are named so I have to describe them by component members, don't I --  R1, R2, C1, C5, Q1: this net makes a fork between Q1 and C5, when they could all just be in a row, C1-R1-R2-C5-Q1, packing everything closer and about halving the total trace length.  R4 should be right beside Q1, it's a local feedback path, delaying that is a bad idea in general.  Why not butt Q1-Q3 all together?  They share many connections, they don't need all those ugly corners and extra length between them.  I don't even know how Q2-E to Q3-B jogs up above the pads, it's like they were routed to make the signal follow the component centerline, not the pad centerline.  Which seemingly intentionally blocks off ground fill between pads, necessitating vias to connect it back up.

Oh, what's up with the different size components, 0805s and 1206s is it?  Just now realizing they're different...  All 0805 or 0603 should pretty much do for everything here... you might not like 0603 so much for beginning hand soldering if that's what you'll be doing, but 0805 I would say is fair game.  If your hands are a bit shaky or your vision not so sharp, 1206 might be more comfortable.  Or you can do everything through-hole, this circuit won't care.

Tim

Got it.  Thanks!  I'll take a look at that.

The different size components - I wanted to use the JLCPCB assembly service, and the ones that are different sizes were probably not available as "basic" parts.  Though I found the process of finding parts through their UI very difficult (someone linked me a github project that made it much easier) so it could be that they were available and I just didn't see them.

Thank you again for the feedback and advice.  I am learning a ton.

[cadr]

Thank you everyone!  I got the boards in, and they look good and seem to work.  Will hopefully be able to do more measurements over the next week, but am super excited they are actually amplifying

Have pictures, etc here: http://kc9dlm.blogspot.com/2021/06/babys-first-pcb.html

[Mattylad]

A bit late to the party and I'm glad it works however:

When you make your next board or modify this one, try and make your reference designators more readable.
I.E. All reading from lefty to right or bottom to top so that they can be read from one direction.
Also ensure that no refs are over copper or other refs nor under components.

I suspect that now it's made BIDIRECTIONAL probably has a screw head over the "AL" 

[cadr]

A bit late to the party and I'm glad it works however:

When you make your next board or modify this one, try and make your reference designators more readable.
I.E. All reading from lefty to right or bottom to top so that they can be read from one direction.
Also ensure that no refs are over copper or other refs nor under components.

I suspect that now it's made BIDIRECTIONAL probably has a screw head over the "AL" 

yeah, I was having trouble with that in the EasyEDA tool, and I really needed to stop fiddling with it and just order it
And if I had to actually assemble them myself (as opposed to having JLCPCB do it) I definitely would have.

But, yes, I agree that would make it much better.  Thanks!

[PlainName]

A minor thing (but many small things can add up) is the ground pads. Generally you try to keep things consistent (i.e. pin 1 always this way, diodes always that orientation, etc) so when someone is whizzing through thinking about last night's TV they don't miss the single item that is different to all the others. On this board, the sig/gnd pair are inconsistent, sometimes the gnd is on the left, sometimes right. The through connections could be forgiven (signal always this side of board, ground that side), but then the top and bottom pair don't match that scheme.

Given the single-sided constraint it may not be practical to make them consistent, but always worth keeping at the back of your mind when you're doing this stuff.