I've always seen high pin-count components drawn with multi-second symbols. Pins are collected into families for each section. So there's one for, e.g., VCORE and GNDs, one for each IO bank's power and grounds (if applicable), one for each group of actual logic/signal pins, etc. The entire component may be spread over multiple sheets.
One of those converters will probably occupy a single sheet, using one or two relatively large rectangle symbols. Don't try to squeeze extra stuff onto the sheet, dedicate one for the purpose. Clarity is better!
As for actually mapping, I don't know. Some packages do it, some don't (and some look like they can, but don't).
Tim