I believe the divider is meant to be switched in on the input to divide the input by 1000 to give a 1Khz to range.
The way it works, from what I can tell, is the 4553s count the number of pulses on their clock pin. IC5 will count to 999, and when it overflows pulses OFV to IC4. IC2 basically generates 1pps, and the 4553s take the stored number and outputs them to the 4511 BCD decoders. I have no idea why all the filters and nand gates are needed for though, other than inverting.
I think I might have to throw one of these together too.