Design re-use and hierarchical design (schematic/layout)

[rfbroadband]

I am interested to know how often do people use

a) hierarchical designs/schematics with their CAD tools
b) apply the concept of design "re-use"  in their projects

- hierarchical designs means you can descent and ascent into different levels (or hierarchies) of your design instead of using 'off-pages' connectors in 'flat' schematics.

- regarding "design re-use" I mean the following:

Assume you optimized a board layout of a switching regulator for lowest spurs, you have a version that has been verified and is working nicely based on lab measurements. The idea is that you save the entire schematic and layout  of that 'sub-circuit' as a new part in a different library. Even if the layout was done on just a two layer design, you could place it onto a 4 or n-layer board and you don't have to re-design the schematics and re-layout the circuit (provided a similar PCB class is used (via size, spacing rules etc).

I follow this approach using OrCAD and therefore have several libraries that contain 'parts' that are sub-circuits with a complete DRC clean layout view and different symbol view attached to it. So if I need to re-use a - 5V switching regulator, I just have to place a symbol from my custom library into the schematic and after netlist generation I can place the entire layout for this sub-circuit onto a new board file, rotate it, mirror it to the bottom of the PCB etc.

I am using a trivial example (small circuit) here but one can imagine how much time you can save if the concept is applied to more complex sub systems (multiple FPGAs using many bypass caps on a single board etc...)...

I am interested in responses like
- I don't care, not worth the time this would take to setup correctly
- Would be interested, but the tool does not support it (please name the tool)
- never thought about  it...but will try it
- yup that's what we do also...
- or any other response  :-)

I am looking forward to responses.

[ludzinc]

Briefly:

Yes I re-use when appropriate./  I had to do about a dozen variations on the same product (Nurse Call buttons) so the Power  Supply / Micro were hierarchical sheets and reused often.

But then the next project will come along, have greatly different power supply needs and a new design is rolled out.

So in short, Yes I do, but when appropriate.

[rfbroadband]

thanks, which tool do you use?

[ludzinc]

Altium

[T3sl4co1l]

Altium. When appropriate.

I've maintained several designs already, which were in need of hierarchical-izing.  Fortunately, the customers were supportive of the added cost to move things around.

Have also used it in Multisim, which is kind of interesting... it works, but beware it loves to reset designators and net names at the drop of a component.

Tim

[Quiggers]

I use it at a schematic level in Zuken Cadstar, I've never looked into linking the re-use blocks to a layout.
Could save a lot of time, Thankfully Cadstar keeps net names, warns you of joining existing nets and increments the part  ids
from the last placed part.

ie you have an R74 placed, you add the re-use block, first resistor in that block becomes R75.

[nctnico]

I have used the automatic design reuse in Orcad capture a couple of times to duplicate the same circuit several times. Very handy for creating backplanes with many slots. In Orcad Layout reusing PCB layouts is more difficult. Sometimes I cut down an existing design (for example SoC + DDR memory routing) and use that as a template for a new design. It should be possible to reuse multiple existing parts with Orcad Layout but I never tried that.

[rfbroadband]

thanks for the posts and feedback.

I only use hierarchical designs unless the design is small enough so it fits onto 2-3 pages (similar to julianhigginson).

Over time I decided to invest the time establish a decent design flow for layout re-use. I am using OrCAD and Allegro and I have to admit the process was pretty painful and required filing quite a few tickets with Cadence...but it is working now and it is huge time saver (I can't stress that enough !).

Once you start using such a design flow you automayically build up external libraries that contain (even smaller) sub circuits that you are likely to use in other designs. Examples being switching regulators, uC templates (like 64 pin device, with XTAL, blocking caps, USB interface) or something as simple as uC Programming header interface that is nothing more than a custom mechanical header with a few passives around it.

In my case, I have all the components linked to a database that contains manufacturer and distributor part numbers, once the re-use module is placed in the schematic, the layout comes with it and all the necessary information for the generation of a BOM is available as well (incl. correct 3D step model mapping).

In practice this means that if I need to re-use for example a 15V to -5V switching regulator that carefully tuned (layout) and optimized for noise, ripple in the past on a 2 layer board with components on the top layer, one can simply take that layout and apply it onto a 4 or 6 layer board or even mirror the components from bottom to top etc. For RF circuits where the exact PCB stack up important for impedances etc. it is less flexible as one can only map the re-use module to PCB stack ups that match the original stack up (or section of the stack up) that is critical for important RF parameters.

Anyway, I hope I could encourage a few more people to look into implementing a layout re-use flow with their preferred tool.

[Vikas Singh]

Hello,

Can you please help As i had created the hierarchical Block and also generated the Hierarchical Symbol for required dsn file to be reused , i had placed the hierarchical symbol in new design where i want to reuse that design and i can descend the hierarchy as well , I want to know that can i also add the schematic related to that design which i had to reuse so that it wont be there to give the schematic of that block again and again who will be reviewing the design.

And is it okay to generate the hierarichcal symbol using generate part in orcad as i have read somewhere it is generally not feasible to generate part from there.

Please help.