Author Topic: High Power/Current PCB Best Practices?  (Read 5042 times)

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Offline zirogravityTopic starter

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High Power/Current PCB Best Practices?
« on: March 13, 2024, 06:00:18 pm »
I posted a question on All About Circuits and received two helpful inputs but am hungry for a bit more detail. For your consideration my post may be viewed here:

After a bit more thought I came to wonder why not just make the PCB into 3 or 4oz copper power planes rather than worry about trace sizing/routing? For example on a 4 layer board 2 layers could be full copper pours for +48V while the remaining 2 layers could be GND pours. Not really sure traces from the battery source connector to each connector are really needed? It is basically a passive "High Power PCB Power Strip" with M12-K coded connectors.

I am thinking the connector B1 would need to have very high current rated pins say 40A per pin but that it would be OK for the M12-K coded connectors to have pin ratings between 12A-16A since the connected motors (load) are at ~4A each for worse on worse conditions.

Not speaking with certainty here really throwing out my ideas for criticisms or support either one or both would be helpful 8)

Thank you,



Offline thm_w

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Re: High Power/Current PCB Best Practices?
« Reply #1 on: March 13, 2024, 09:17:07 pm »
    Are there any immediate reasons why this is a bad idea?
    Trace width calculators out there seem to fixate on a single trace on a single layer. Can trace widths be reduced if they are routed/ganged on multiple layers? I cant seem to find such calculator or topics that may support this approach?
    Are the specification values I am using as my starting point unreasonably high to start with?
    I do not really have a very good intuition on safe and reasonable thermal rise /dissipation values any inputs here would be appreciated.
    I am using M12-K connectors and the footprint provided by the vendor suggested "1.6mm" PCB but from what I have read about power carrying PCB I should be expecting to use 2oz or 3oz Cu so I also expected a thicker PCB. Perhaps some thoughts on stack would be appreciated also?

Trace width would be reduced by around half if the routing is on two layers, yes.

Trace calculators are quite conservative, usually use a temperature rise of only 10 C, which is minimal. But there may be other expectations like efficiency and maximum fault current that you want to think about.

1.6mm thick PCB is still no problem with 2 or 3oz copper. The thickness of the copper itself is tiny (3oz = 0.1mm).

You can use 3 or 4oz copper but it won't magically reduce required trace width to nothing. Costs will go up with more plating. eg JLCPCB goes up ~$18 if you increase 1oz to 2oz.
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Offline nctnico

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Re: High Power/Current PCB Best Practices?
« Reply #2 on: March 13, 2024, 10:44:34 pm »
Going for more layers is likely cheaper compared to thicker copper plating.

Also investigate thouroughly how the maximum current for the connector is specified (=ask the manufacturer if the datasheet isn't clear). For a lot of connectors, the maximum current is for a single pin at 20 degrees Celsius. If you have multiple pins, you need to derate by 50% or even more to stay within operational limits of the connector.
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Offline free_electron

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Re: High Power/Current PCB Best Practices?
« Reply #3 on: March 18, 2024, 09:10:36 pm »
There's multiple things to consider
- drilling through thicker copper causes more wear on the drills. especially small ones. so things like vias will need to be larger
- plating becomes a problem. you will need larger holes for several reasons ( mainly current density and spread in the hole. it doesn't grow evenly)
- trace and space. thick copper does not etch "vertically" the wall will become a trapezoid. when you specify a 8 mil gap , to get 8 mil opening at the copper to substrate interface, at the top it will be much more. an 8 mil opening at the top of the copper would still be a short at the bottom for 4 oz copper. So you need a different set of rules.
- mixing traces and planes on a 4 oz copper becomes very hard. the spacing and tracewidth will have to be adjusted for the etch rate
- current balancing is also a problem. don't expect the current to balance between different layers. you will need to create via farms
- thick copper is one thing but plating is another thing. The plating is typically only 17 micron. it doesn't do you any good to have 4 oz copper and then bring it up with a small hole and thin plating. you will have to size the vias and fram them to get current in and out of the layers
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Offline Infraviolet

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Re: High Power/Current PCB Best Practices?
« Reply #4 on: March 19, 2024, 11:44:06 pm »
Copper thicker than 1oz (30um) also often forces you to have greater spacings between traces*, even low current ones on other parts of the board, and greater minimum trace sizes* (again all over the board). So increasing the copper thickness can be a non-starter if one is reliant on being able to have very fine features elsewhere on the same board.

*often stepping from 0.15mm or so to 0.25mm or more, both for trace thickness and spacing between

Offline aliarifat794

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Re: High Power/Current PCB Best Practices?
« Reply #5 on: March 25, 2024, 04:15:26 pm »
The copper thickness should be adequate for the expected current levels. Using 3 or 4 oz copper for power planes can handle high currents effectively. For your motor power distribution PCB design, you have to select the right PCB thickness too. The standard thickness is 1.6 mm. Source:

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