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How on EARTH do you lay out a part like this?

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A new client came to me today with a debugging problem they're frantically trying to solve. Long story short, I'm pretty sure the whole issue is how they've laid out USB 3.0 pairs with big 1" stubs running off to a TVS diode, times six for the connector.

Which leads me to the question, because I've seen this a LOT: The Wurth 82401646 comes in an MSOP-8 package, just WILDLY ill suited to coherently routing differential pairs near/past it so as to keep stub length minimized and avoid vias. Like, I can't imagine there's a way to do it for USB3.0 without stubs/vias and while maintaining any SEMBLANCE of impedance control. And yet, that datasheet specifically calls out "high speed differential signals like USB3.0".

Why do these kinds of parts exist? Who uses them, besides people who quickly learn not to? Why does this part tell me it's for USB3.0 when it's virtually guaranteed to tank a USB3 design?

Like, what am I missing here?

Like this?  There's some coupling between 1/2 and 3/4, but perhaps not too bad.  Or don't I get it?  (it happens)

No - I think you're right. That's the solution a friend just came up with as well. Two of those pairs DO get perilously close. And it's a tight squeeze unless you're working with roughly 3mil prepreg by my estimate (I assumed you wouldn't be able to fit 4 traces underneath at controlled impedance sizing, but maybe). But that might actually be a practical way to do it.

That said, I think I'll probably design in purpose-built fly-by parts still :)

I would also use two via's for GND and Vcc each. One via north, and the other south of pads 7 & 8, and I would add a decoupling capacitor. This capacitor will (partly) short circuit transients, instead of shunting them into your power planes.

Weird, they show a diode from VCC into the TVS.  Well, if that's the case, it's just for bias, and clamping itself, not for bypass.  So, uh, that saves vias, then, huh?...



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