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level shifter for DC-DC controlled SHDN

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john23:
Hello ,I have built an DC-DC which is supposed to be turned on and off using SHDN shown in the photos in the link.

Data sheet link of the DC-DC is also attached.

I want to turn it ON using 0V into SHDH and turn it OFF and discharge the output using 3.3V  into SHDN(GPIO ).

The output needs to be discharged when the SHDN input 3.3V but my output of the component is set to -4V.

PMOS what chosen to discharge the output ,however PMOS cannot open and close like I want from a 0-3.3V directly to the gate of the PMOS as shown in the attached photos in the link.

There is a need to do level shifting to allow the PMOS to open when i what it.



I have chose a PMOS with Vt=-0.45 from datasheet shown below

I want the PMOS conducting using the formulas below:

Vs=0V Vd=-4V

conducting condition:

Vsg>0.45 --> 0-Vg>+0.45 Vg<-0.45



I need level shifter to make the PMOS conducting.

I learned previosly the level shifting could be done using zener diode using its reverse voltage value.

How do I implement  voltage level shifting in my situation?

I know that we can do level shifting with Zener diode, if there is a good alternative i'll be happy to hear.



Thanks.

https://www.vishay.com/docs/71683/si4403dy.pdf
https://www.analog.com/en/products/ltc1261.html?ADICID=SYND_WW_P682800_PF-octopart

https://ibb.co/tH13SnW
https://ibb.co/XDrSfP9

Kean:
You could use a Zener diode to level shift the SHDN signal to the MOSFET gate, but you would need to use an N-Channel MOSFET.
You would also need a low value Zener maybe 2.4-3.6V, or maybe use 4-5 silicon diodes in series.

Why do you want to use a P-Channel MOSFET?

Kean:
BTW, this question doesn't really belong in this section.  This section is for CAD software related Q's.

For circuit design or component selection you would get more eyes if you put this under "Projects, Designs, and Technical Stuff".

john23:
Hello Kean , I am focused on the level shifting principle in this simulation.
I will choose NMOS PMOS afterwards.I have a zenner diode shown in the link bellow with 3.6V breakdown.
How do you recommend me to connect this diode to achieve this effect?
Thanks.

https://www.mouser.co.il/ProductDetail/Diodes-Incorporated/BZT52C3V6-7-F?qs=We1mx2pNWM9dxcfB67aIQA%3D%3D

Kean:
Here is a quickly drawn LTSpice schematic and simulation using a 4.7V Zener (no 3.6V Zener in my LTSpice).

The green trace is 3.3V enable signal.
The blue trace is the level shifted gate drive.
The red trace is the -4V supply (always on, but current limited via R2)/
The pink trace is the discharge current through R2.

Too low a level shift and the FET will be on all the time.  Too high a level shift and the FET won't turn on hard enough (or at all).
With the 4.7V zener the N-FET doesn't manage to fully discharge the -4V supply.

Also attached is another schematic and simulation using 4 (or 5) Silicon diodes.  It does a slightly better job of discharging the supply, similar to a lower voltage Zener.

I'm sure there are better ways to do this using a few more components, but I successfully used a similar technique to this in a design years ago.

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