Author Topic: LTspice FET parameters  (Read 2259 times)

0 Members and 1 Guest are viewing this topic.

Offline FaringdonTopic starter

  • Super Contributor
  • ***
  • Posts: 2103
  • Country: gb
LTspice FET parameters
« on: October 10, 2023, 01:08:09 pm »
Hi,
Does the LTspice simulate the way a FET junction capacitances change with voltage?
Or do they just give one  capacitance.
Eg, what is Coss for Si4848DY FET in LTspice?
eg the Si4848DY is as shown in LTspice

Si4848DY datasheet:
https://www.vishay.com/doc?71356
'Perfection' is the enemy of 'perfectly satisfactory'
 

Online SiliconWizard

  • Super Contributor
  • ***
  • Posts: 14905
  • Country: fr
Re: LTspice FET parameters
« Reply #1 on: October 11, 2023, 01:14:41 am »
LTSpice appears to use BSIM4 models (which would be pretty much the norm with any modern Spice-based simulator), described here: http://bsim.berkeley.edu/models/bsim4/

Yes, the parasitic capacitances are simulated based on the operating point.
You'll actually find your answer (at least as much as it can be answered) here: https://electronics.stackexchange.com/questions/303729/how-do-i-determine-mosfet-capacitances-cgs-cds-cgd-in-ltspice
 
The following users thanked this post: Faringdon


Share me

Digg  Facebook  SlashDot  Delicious  Technorati  Twitter  Google  Yahoo
Smf