Before I start I'm not looking for any FCC certification of this layout at. Nor will I build this layout.
To begin, the nRF5340 is available in what Nordic calls an aQFN-94 package. Of course what makes this a challenge is that the pin pitch is 0.4mm and it's a hybrid of a BGA and QFN package. Nordic's datasheets suggest you use buried micro vias for the inner row. However because I tend to be stingy, I would like to avoid buried vias. Even using JLCPCB's 0.25/0.15mm vias with via-in-pad, I you can't meet the design rule requirements.
On the right is the regular footprint. I was thinking if I reduced the size of the exposed pad on the PCB I could fit vias in without via in pad. It seems to work with a 0.5mm reduction on each side and then using 0.25/0.15mm vias (left). This seems to pass the design rules for JLCPCB at least, but is awfully cursed.
I would think this type of footprint change would be discouraged due to assembly reasons. Assuming the inner vias are tented I assume this is still a terrible idea?