Electronics > PCB/EDA/CAD

Multilayer PCB

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pirulo123:
Hi All,

I'm making my first multilayer PCB (4 layers) and I've a few thing I would like to ask the experts.
is it convenient to have at least one power plane (+) ? How should I mix power and ground planes ?
Can I have signals on all layers ?
Should I distribute my layers evenly ? meaning the all stacks have the same isolation/copper thickness.
Should I use 35um or 18um copper thickness for my inner layers ?

Thanks for reading.
Regards.

jahonen:

--- Quote from: pirulo123 on June 21, 2011, 09:00:15 pm ---Hi All,

I'm making my first multilayer PCB (4 layers) and I've a few thing I would like to ask the experts.
is it convenient to have at least one power plane (+) ? How should I mix power and ground planes ?
Can I have signals on all layers ?
Should I distribute my layers evenly ? meaning the all stacks have the same isolation/copper thickness.
Should I use 35um or 18um copper thickness for my inner layers ?

Thanks for reading.
Regards.

--- End quote ---

Yes, it usually is practical to have power plane. Typical build-up for 4-layer board is such that inner layers are used for power and ground planes (no traces here!). Then the most critical signals are routed in top or bottom layers so that most critical or noisy signals are routed to adjacent layer of the ground plane layer (or, if in odd case, if you have PECL logic in your board, the reference plane is VCC). This gives best EMI and signal integrity performance. High-edge rate signal layer swaps from bottom to top or vice versa should be avoided due to return path discontinuity, or if that is unavoidable, there should be a bypass capacitor (or several, more the better) near the signal via between VCC and GND planes to provide a path for return currents.

But if you must cram traces in inner layers, PCB manufacturing does not care if you have traces in inner layers, as long you don't violate minimum design rules.

Build-up dielectric thickness is a matter what you want. Typical build-up is such that the distance between layers 1-2 and 3-4 are in order of 0.2 mm, and between 2-3 (i.e. middle layers) 1.0 mm for 1.6 mm thick PCB. That is good for usual digital stuff, since you can get sanely low impedance (less than 100 ohms) with reasonable trace width (0.2 mm will yield to about 75 ohms which is nice for usual logic signals). RF people will typically want thicker dielectric since it yields to wider microstrips, and thus uncertainty of trace width affects less to the impedance. Wide traces are not a problem on RF since number of signals is typically low.

Copper thickness depends how much DC-current you want to draw from your planes and what is the minimum insulation gap and trace width there. With 18 µm copper, you can produce finer features, but this is usually not a problem for most common stuff using 4 layers, even with 35 µm copper.

Regards,
Janne

pirulo123:
Hi jahonen,

Thank you very much for your feedback.

I found this site today http://www.hottconsultants.com/techtips/pcb-stack-up-2.html and it sorts of clears the path on how to stack up the layers.
I've been stupid enough to start adding layers on the go anywhere I run out of routing space, it's the worst thing one can do as I've discovered...
Something they don't say or isn't clear it's whether or not I can flood fill the top and bottom layer with a ground plane or leave just the signals with no fill, whatever this helps improve the EMC characteristics and the signal integrity I don't know.

Regards.
Ben.

jahonen:
You can do the flood-fill, but then it is recommended to add bunch of ground vias (something in raster of 10x10 mm or so) to tie the fill tightly to main ground plane. The ground vias make also excellent ground points for short scope ground spring.

Regards,
Janne

gregariz:

--- Quote from: jahonen on June 22, 2011, 08:12:36 am ---RF people will typically want thicker dielectric since it yields to wider microstrips, and thus uncertainty of trace width affects less to the impedance. Wide traces are not a problem on RF since number of signals is typically low.

--- End quote ---

Thats true although I typically like to keep the signal layer thickness to less than a 1/32" or 0.7mm thickness (thinner is generally better within reason but def the case on duroids etc). It depends on the frequency of use but above a GHz its typically the case that you lose more through board losses than a mismatch. ie if I were running lines on a 2 layer 1/16" or 1.6mm thick board I would narrow up the lines and put up with some mismatch loss (usually not that bad) rather than run full thickness lines.

Just a tip I've found through experience.

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