Author Topic: Shoutout to TI package designers!  (Read 309 times)

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Offline Ice-TeaTopic starter

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Shoutout to TI package designers!
« on: Yesterday at 11:03:19 am »
If you're reading this, I'm sure you've had some serious  :wtf: moments when looking at some packages and footprints. There are Hall of Shames for those. But how often do you actually encounter works of art that make you go "well, that'll do!"? Not often, right?

I present to you the LM73100 Ideal Diode.



Those two wonky stripes in the middle? In- and output. This just makes me happy. Surely I can't be the only one?

Cherry on top? It's called a "VQFN-HR". And "HR" stands for "HotRod".

I am pleased.
 
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Online Doctorandus_P

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Re: Shoutout to TI package designers!
« Reply #1 on: Today at 09:23:30 am »
I was surprised by the pinout of the RP2040.
It does not have any GND pads on it's circumference. It "only" has the big GND pad in the bottom center of the package.
So that is 4 extra I/O pins for free compared to a more traditional use of the package.

Another unconventional part is that I/O pins are all "GPIO[n]" and no division over ports.

This is a weird beast. Dual Cortex M0+ and that I/O structure is probably related to the PIO state machines, which can do quite fast specialized IO things.


« Last Edit: Today at 09:31:25 am by Doctorandus_P »
 

Offline Uky

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Re: Shoutout to TI package designers!
« Reply #2 on: Today at 03:32:45 pm »
The "best" packages for a PCB designer are those that have the exposed center slug = GND and a surrounding ring of VCC/VDD etc pins around it.
EasyPeasy to decouple on the secondary side of the PCB using copper filled through-hole vias. Fan-out from such packages are really easy.

The prize for the worst package I have ever encountered was a BT chip (now long gone) from TI.
That BGA chip had the GND and other supply pins spread out all around the package making fan-out nearly impossible, not to mention
trying to acheive the shortest possible tracks to the decoupling capacitors.

For the foot print designers (such as myself), I can see which manufacturers that knows the pain we face and that they
present the foot print drawing in such a way that the drawing specifies pin pitch, pad dimensions and suggests suitable
pad dimensions, specifying _CENTER_ dimensions instead of airgaps.  |O

To them: Kudos

To all other: Take a PCB design training class and learn how we work.
 


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