Author Topic: Protel PCB 2.8 - what could cause this strange DRC error, with split planes?  (Read 391 times)

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Offline peter-h

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I am running this old prog under a winXP VM. It works great and I have done many many designs with it. I am also more than familiar with its cryptic and mostly useless DRC errors, which in most cases are solved by trial and error only; the .drc file is almost useless.

But now I have a weird problem and wonder if somebody of sufficient age might remember how to deal with it. I have this PCB with a split ground plane (Internal Plane 1):



Placing pads in each these four areas, with all the pads having a "relief to Plane 1" should not produce a conflict. The nets are GND1 GND2 GND3 GND4. But Protel is in some cases joining them up - as if the planes were joined. I have carefully checked that the tracks placed on the Plane 1 layer have no breaks in them, since that would be an obvious cause. The way to generate split planes is to place a track on the plane layer. I wondered if one is supposed to use a Polygon Plane? I tried that and it doesn't seem to make any difference.

There are cases where one has to just give up and accept some DRC errors but I don't like doing it. Usually, by clicking on some random track, the DRC error goes away, but I have spent a few days on this and can't solve it.

The DRC errors are listed as broken subnets, but clearly they are physically connected within each piece of the plane. However listing broken subnets when actually there is some clearance error or a short, has always been a feature of Protel PCB...

I also wonder if anyone knows what the coordinates in the DRC error listing mean? They are not within the PCB area...

Clearance Error
 Track (1138mil,2581mil  1268mil,2581mil)  Top Layer +DCIN
 Pad (1138mil,2583.047mil)  Multi-Layer No Net

Clearance Error
 Track (3293mil,2681mil  3293mil,2741mil)  Top Layer GND_2
 Pad (3293mil,2743mil)  Top Layer GND_1

Clearance Error
 Track (3388mil,2186mil  3388mil,2281mil)  Top Layer -20V_2
 Pad (3388mil,2286mil)  Top Layer No Net

Many thanks for any tips.
« Last Edit: September 01, 2019, 09:33:55 am by peter-h »
 

Offline peter-h

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I have solved a part of this problem. I remember something from a decade ago: Protel PCB doesn't recognise normal tracks (placed into a plane) as breaking the plane. This stuff is actually in the reference manual... The only thing it recognises is a polygon. In my version (v 2 . 8 ) it differs from the reference manual wording in that this is called a Polygon Plane.

The polygon plane must be placed so it exactly encloses the area which is to be isolated, meaning that the end point must be exactly over the start point (not enough for the tracks to touch).

However I am still finding that the long and narrow vertical portion (on the RHS of the PCB) of the plane is not making a connection. This seems to be an undocumented feature. I have not spent more time on it since it is obvious that there will be a connection on the real PCB, but it might be that this mysterious value controls some sort of grid on which the connectivity is checked and if the channel left is narrower than the grid then no connectivity will be found. That grid parameter is certainly not a grid for the polygon placement.



When this feature is used to produce a filled polygon, the grid value controls the pitch at which the tracks are placed, so typically you might use 0.030 track and 0.025 grid to make sure the fill is full.

I looked up the manual for Protel 99SE (which I also have but have not used it so far) and it does the same thing, except that they have renamed the feature as a Split Plane, and documented it somewhat better.

Magically most of the clearance errors have disappeared, but the aforementioned coordinates still don't make sense. I suspect they are relative to some undocumented origin point...

One other thing which is generally necessary for the program to correctly allocate nets to objects is to unload the netlist, reload it, and Autoroute All to remove the ratsnest. It's always been like that.

I don't know if the $1000 programs people use nowadays are any better. I would hope the $10k-20k ones (which Protel PCB morphed into) are absolutely perfect and don't need these silly stunts to define split planes :)
« Last Edit: September 01, 2019, 05:08:51 pm by peter-h »
 

Offline peter-h

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I have now finished this board but could not avoid some weird issues. It raises the specific question of how PCB software handles split planes. How does it determine which pads (with reliefs to the plane) are actually connected to each other, if there is a weird geometry in the split?

One obvious way to determine topological connectivity is by dividing the whole plane into squares and "colouring in" each square around a particular pad, and if there is a contiguous line of coloured-in squares between two pads, then those two pads are connected.

That will break down if the grid used for the squares is bigger than a narrow channel in a split plane.

I don't know if there are algorithms which can determine connectivity without doing this i.e. which will pick up a conductive channel of any width or complexity, no matter how narrow?

For example, I narrowed down this:



A connects to B but does not connect to C. This is obviously nonsense!

Protel requires that for a split plane to be DRC-correct, the split must be done by placing a POLYGON PLANE onto the plane, without a fill, so you get just the outline track. So obviously their algorithm is a bit "simple". Yet, no matter how many times I re-do this process, I cannot make it see C as connected to A and B. In the end I fixed it by connecting B-C with a track :)
 

Offline peter-h

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Having done more work on this, it appears that Protel doesn't support just any old polygon for determining connectivity within a plane.

It doesn't seem to support angled tracks. It works ok if all tracks making up the polygon are at 0 or 90 degrees. 45 degree tracks seem to be internally converted to rectangular areas (where the angled track is a diagonal of the rectangle) and that will obviously break certain situations.

Was this ever fixed, or documented? 99SE seems to do the same thing.

Most people will never discover this because complex split planes are not common.
 


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