QFN thermal pad: best practices?

[djacobow]

I'm designing a board that uses an ADP5062, a charge controller / LDO that comes in a QFN-style package with a thermal pad. Actually the package is a 4mm x 4mm 20 pin LFCSP.

The use of the center thermal pad is optional, but it obviously allows more current to be managed. It should be connected to ground.

This is my first experience with this type of package and I've been poking around the interwebs to see what the correct and proper way to do this is, and I'm getting mixed messages.

1) I could just put the bad down and connect it to ground on the same plane, snaking a small wire in from the corner. I guess this is OK, but not great from a thermal perspective, and OK, not great from a ground perspective. It is easy, though and presents no problems with CAD (using EAGLE for this board)

2) I could add vias to a ground plane on the other side of this (2-sided board). But a lot of folks say don't do this, or if you do, do the following special things with the solder mask, etc.

What I have done so far is draw the pattern without vias or holes. Then, in layout, I have added vias on top of the solder pad, and named them GND, with the intention that they connect with a ground fill on the back. DRC complains about overlap, but they are same signals, so maybe I can just ignore it.

So, what is the best thing to do?

What is the best way to do it in EAGLE?

Sorry if this is a FAQ. I don't want to screw it up. If I were just soldering up a few of these on my bench, I don't think I'd sweat it, but this is my first design that will actually get a production run.

Regards,
Dave J

[Precipice]

3) place a massive via in the belly pad.

This lets you hand solder it with a soldering iron. Poke a fine tip through the hole, followed by solder.
It's not appropriate for real production, but for prototyping, it's got a lot of charm if you're not equipped to reflow solder things.

[djacobow]

3) place a massive via in the belly pad.

This lets you hand solder it with a soldering iron. Poke a fine tip through the hole, followed by solder.
It's not appropriate for real production, but for prototyping, it's got a lot of charm if you're not equipped to reflow solder things.

Yup, that's exactly what I'd do for home assembly. But these actually will be manufactured!

[djacobow]

Just replying to my own question, I see I can set the "same signal" SMD / via clearance to 0mil, and then the DRC errors go away.

But is that kosher? It seems like it should be fine, but ...

[Precipice]

In that case, yes, vias. Several...
If you leave them unmasked on the back (and don't pay for via plugging), then they'll wick solder away from the belly pad, letting it sit lower, but risking voids that will (slightly) worsen thermal conductivity.
If you plug them, or mask them, the solder won't escape, and nor will pockets of flux or gas, the chip will float a bit, and reliability of the QFN pins may be reduced.

In short, there's no actual, bulletproof, 'proper' answer.
In consumer boards, I unmask, don't plug, and hope for good things.
In automotive, I plug, and very carefully tune the solder paste volume. The assembly shop x-rays and slices up boards, to make sure that things are going according to plan.

(No idea bout Eagle's foibles, sorry!)

[djacobow]

In that case, yes, vias. Several...
...
In short, there's no actual, bulletproof, 'proper' answer.
In consumer boards, I unmask, don't plug, and hope for good things.

OK, well, this is consumer, and I don't think we want to pay for special PCB processing. So I'll just unmask the backside of the board under the pad and hope for the best. I don't really care about protrusions, anyway; there will be nothing else on the back in this location.

This is good, too, as it will allow me to use a soldering iron to do a few at home if I want. EEVblog did a video awhile back using this technique, holding an iron against the bottom of the board. It worked "a treat," as they say. :-)