Signal traces under 125MHz MEMs oscillator

[EPC-EPDAC]

6 layer board with QorIQ processor, and 3 10/100/1000BASE-T PHYs

QorIQ requires a 125MHz clk when using a RGMII interface. I plan to use a fairly small (2.5 x 2mm) MEMS oscillator and can place it very close to the clk input pin, however numerous other high speed signals that are routed on mid layers will have to pass under the oscillator.

From a functional and EMI perspective am I better to get the oscillator close ~ 1cm from destination pin (with other signals below but on the other side of a solid ground plane) or place it say 5cm away where no other signals will have to run under the oscillator?


Thanks in advance

[jahonen]

I think either way will work just fine. Of course if you have longer trace, then termination and crosstalk issues becomes more critical, but I assume you know how to handle those. Having a ground plane in next layer means that you already have a leg up

Regards,
Janne

[nctnico]

Using a 33 Ohm series resistor in the clock signal is a good idea either way.

[AndyC_772]

If you can get it within 1cm of the processor, put it there and route the clock straight from one to the other. A trace that short just doesn't have the length to radiate or pick up interference to any significant extent. Make sure there's a continuous, unbroken ground plane on a layer adjacent to the clock trace and it'll work fine.

FYI, Gbit Ethernet is often very noisy in terms of radiated EMI, so you may well see harmonics of 125 MHz when you go emissions testing - but it won't be directly due to this crystal or its connection to the processor. Expect to need shielded RJ45 cables, and pay close attention to the grounding around your Ethernet PHY.

[EPC-EPDAC]

Thanks for your comments.