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Stitching vias - how many? (density)

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shadewind:
I'm laying out a PCB for an LED driver and I want to stitch the top and bottom planes together. I have a ground plane which is mainly for grounding purposes except for the driver chip itself which has a die attach pad for thermal relief. I also have a large island for where the switching FET, freewheel diode and inductor meet and I intend for this to provide thermal relief for the FET and diode. I have an identical one on the bottom to be stitched together with the top one.

How many should I use? Right now, I'm using a grid with 100 mil spacing but that results in a lot of vias (perhaps 200 on the whole board which is about 5 cm x 5 cm). Is that too much? How many should I use for the ground plane (which isn't so much for thermal relief) and how much for the switching island?

Alex:
lamda/20 where lamba is the wavelength of the highest frequency of concern with the propagation speed on whatever PCB material and stackup you are using.

shadewind:

--- Quote from: Alex on July 09, 2011, 11:38:46 am ---lamda/20 where lamba is the wavelength of the highest frequency of concern with the propagation speed on whatever PCB material and stackup you are using.

--- End quote ---
But I'm not really using that many high frequencies and I have nothing which is that important, I just want to create a low impedance ground path everywhere. For the switching island, I want to lower thermal resistance.

This is what it looks like now: http://dl.dropbox.com/u/2462319/highpowerled.pdf

Alex:
Low impedance at what frequency? You should also pay attention to harmonics; products with a 1kHz clock fail EMC tests at 1MHz...

You could then bring the via closer to the heat generating components and remove them from where they are not needed. possibly via-in-pad which is then flooded with solder when the component is soldered.

shadewind:

--- Quote from: Alex on July 09, 2011, 11:49:50 am ---Low impedance at what frequency? You should also pay attention to harmonics; products with a 1kHz clock fail EMC tests at 1MHz...

--- End quote ---
I see. My switching frequency is 800 kHz so I suppose I have harmonics much higher than that though I'm not sure what the "highest" frequency of concern is and I'm not sure what the propagation speed for a 1.6 mm two layer board with 1 oz copper is either.


--- Quote from: Alex on July 09, 2011, 11:49:50 am ---You could then bring the via closer to the heat generating components and remove them from where they are not needed. possibly via-in-pad which is then flooded with solder when the component is soldered.

--- End quote ---
Is that a suggestion to reduce the number of vias? Any particular reason or just that it's unnecessary?

I suppose that if I have vias in the pads of the FET and the Schottky diode, I wouldn't really need to stitch the layers together at any other points, right?

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